Lead Verification Engineer - DPU IP (SystemVerilog/UVM)

Arm Limited

United States

Hybrid

USD 120,000 - 180,000

Full time

14 days+

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Job summary

Arm Limited is seeking an experienced verification engineer to join the Systems Media IP team, working on ISPs, Display Processors and Video codecs for Arm Compute Subsystems across automotive, IoT and client markets.

You will own and drive verification for DPU subsystems, architect scalable SystemVerilog/UVM environments and verification IP, and collaborate with architecture, design and software teams to ensure seamless integration.

Qualifications

  • Strong SystemVerilog and UVM knowledge with complex verification environments.
  • Hands-on verification on AMBA APB/AXI or similar on-chip interfaces.
  • Experience creating verification plans from scratch for complex IP.
  • Proven track record verifying subsystems with multiple units.
  • Experience building verification testbenches.
  • Programming skills in Python or C.
  • Familiarity with regression, version control and linting workflows.

Responsibilities

  • Own and drive verification for a DPU subsystem from planning through sign-off.
  • Contribute to verification architecture, planning, integration strategy and quality criteria.
  • Architect reusable SystemVerilog/UVM environments and verification IP.
  • Define verification plans, coverage models, sign-off criteria and quality goals.
  • Identify risks early and drive mitigations across teams.
  • Review architecture changes for correctness and observability.
  • Lead resolution of complex unit- and system-level failures.
  • Align verification activities across units and teams.
  • Drive improvements in verification methodology, automation, and CI.
  • Use data to identify gaps and guide engineering priorities.
  • Influence project planning with evidence-based recommendations.
  • Build links with architecture, design and software to ensure integration.

Skills

SystemVerilog
UVM
AMBA APB/AXI
Python
C
Verification testbenches
Regression / CI
Linting / version control

Tools

SystemVerilog/UVM tooling

Job description

Arm Limited is seeking an experienced verification engineer to join the Systems Media IP team, working on ISPs, Display Processors and Video codecs for Arm Compute Subsystems across automotive, IoT and client markets.

You will own and drive verification for DPU subsystems, architect scalable SystemVerilog/UVM environments and verification IP, and collaborate with architecture, design and software teams to ensure seamless integration.

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