Lead RTL Design & Verification Engineer, Remote

Visibl Semiconductors; United States; Remote; USD 160,000 - 210,000; Full time

Job summary

Visibl Semiconductors, a seed-funded hardware startup, seeks a Senior Digital IC Engineer to own digital subsystems in a mixed-signal ASIC. You will collaborate with CTO, analog lead, and firmware teams to define behavior, implement RTL, and drive verification and handoff.

The role emphasizes understanding system-level requirements, documenting interfaces, and delivering a robust build-and-test flow while working remotely with US-based engineers.

Qualifications

• Strong SystemVerilog RTL design and self-checking verification skills.
• Hands-on experience with synthesis and timing analysis.
• Experience resolving hardware–firmware interface questions.
• Ability to work independently and communicate decisions clearly.
• Knowledge of metastability and reset behavior in digital design.

Responsibilities

• Own digital implementation, verification and synthesis handoff.
• Develop and refine RTL for digital control and configuration logic.
• Create a verification plan with self-checking testbenches and coverage.
• Deliver a reproducible build-and-test flow and integration documentation.

Skills

SystemVerilog RTL design

Self-checking verification

Synthesis

Static timing analysis

Timing constraints

Metastability handling

Reset behavior

Asynchronous interfaces

Hardware–firmware interfaces

Independent work + communication

Tools

Synthesis tools

STA tools

Job description

Visibl Semiconductors, a seed-funded hardware startup, seeks a Senior Digital IC Engineer to own digital subsystems in a mixed-signal ASIC. You will collaborate with CTO, analog lead, and firmware teams to define behavior, implement RTL, and drive verification and handoff.

The role emphasizes understanding system-level requirements, documenting interfaces, and delivering a robust build-and-test flow while working remotely with US-based engineers.