Lead RFIC & Analog Architect — Hybrid, PST Hours

Manpower, Inc.

San Jose (CA)

Hybrid

USD 180,000 - 240,000

Full time

3 days ago
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Benefits offered by this job

Medical plans
Vision plan
Health Savings Account
Weekly Pay

Job summary

ManpowerGroup seeks a Principal RFIC Design Engineer IV in San Jose, CA, to join the RF/Analog Design team. You will own RF/analog block designs, drive architecture, simulate, and supervise layout for high-performance ICs with cross-functional collaboration.

The role requires hands-on RF/analog IC experience, CMOS tech knowledge including 40nm and below, and a track record of successful design releases. Hybrid work model and potential relocation support are offered.

Qualifications

  • Hands-on design and development experience in RF and analog integrated circuits.
  • Experience in CMOS circuit design including baseband amplifiers, RF amplifiers, mixers, drivers/receivers, CDRs, equalizers, and power amplifiers.
  • Demonstrated experience with 40nm and below CMOS technology.
  • Track record of successful design releases and mass production readiness.
  • Proficiency with industry-standard EDA tools (Cadence, Mentor, Siemens, Ansys, or similar).

Responsibilities

  • Own the design of high-performance RF and analog circuit blocks from transistor-level architecture through module-level implementation.
  • Drive circuit architecture, simulation, optimization, and layout supervision, including layout verification and readiness for downstream testing.
  • Prepare test plans for the testing team and support reliability and yield assessment through modeling and evaluation.
  • Perform simulation to bench and bench-to-test correlations, including silicon-level and applications-level evaluation.
  • Deliver clear, accurate documentation and communicate progress, risks, and results across cross-functional partners.

Skills

RFIC design
Analog IC design
CMOS technology
EDA tools

Tools

Cadence
Mentor
Siemens
Ansys

Job description

ManpowerGroup seeks a Principal RFIC Design Engineer IV in San Jose, CA, to join the RF/Analog Design team. You will own RF/analog block designs, drive architecture, simulate, and supervise layout for high-performance ICs with cross-functional collaboration.

The role requires hands-on RF/analog IC experience, CMOS tech knowledge including 40nm and below, and a track record of successful design releases. Hybrid work model and potential relocation support are offered.

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