Senior RFIC Design Engineer - Analog & Mixed-Signal

WD; San Jose (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

WD is seeking a Senior Analog IC Design Engineer to design high-performance analog and mixed-signal blocks in advanced CMOS processes. You will work on transistor- and block-level architectures, simulations, verification, and cross-functional collaboration.

This role requires extensive experience, a track record of design releases, and proficiency with Cadence, Mentor, Siemens, and Ansys in a California setting.

Qualifications

• Must have hands-on analog/mixed-signal IC design experience.
• Experience in at least one CMOS circuit area (amplifiers, PMIC, data converters).
• Design releases and mass production track record.
• Strong knowledge of 40nm and below CMOS tech and EDA tools.

Responsibilities

• Design high-performance analog/mixed-signal circuit blocks.
• Architect, simulate, optimize, and supervise layout verification.
• Coordinate with cross-functional teams and document results.
• Contribute to test plans, characterization, reliability and yield.

Skills

Analog and mixed-signal design

CMOS circuit design

PMIC design

Data converters (ADC/DAC)

40nm and below CMOS

EDA tools (Cadence, Mentor, Siemens,An

Analog layout techniques

Floor planning & routing

Communication skills

Team collaboration

Education

BSEE

MSEE

PhD

Tools

Cadence

Mentor

Siemens

Ansys

Job description

WD is seeking a Senior Analog IC Design Engineer to design high-performance analog and mixed-signal blocks in advanced CMOS processes. You will work on transistor- and block-level architectures, simulations, verification, and cross-functional collaboration.

This role requires extensive experience, a track record of design releases, and proficiency with Cadence, Mentor, Siemens, and Ansys in a California setting.