Design Engineer IV

Manpower, Inc.; San Jose (CA); Hybrid; USD 180,000 - 240,000; Full time

Benefits offered by this job

Medical plans

Vision plan

Health Savings Account

Weekly Pay

Job summary

ManpowerGroup seeks a Principal RFIC Design Engineer IV in San Jose, CA, to join the RF/Analog Design team. You will own RF/analog block designs, drive architecture, simulate, and supervise layout for high-performance ICs with cross-functional collaboration.

The role requires hands-on RF/analog IC experience, CMOS tech knowledge including 40nm and below, and a track record of successful design releases. Hybrid work model and potential relocation support are offered.

Qualifications

• Hands-on design and development experience in RF and analog integrated circuits.
• Experience in CMOS circuit design including baseband amplifiers, RF amplifiers, mixers, drivers/receivers, CDRs, equalizers, and power amplifiers.
• Demonstrated experience with 40nm and below CMOS technology.
• Track record of successful design releases and mass production readiness.
• Proficiency with industry-standard EDA tools (Cadence, Mentor, Siemens, Ansys, or similar).

Responsibilities

• Own the design of high-performance RF and analog circuit blocks from transistor-level architecture through module-level implementation.
• Drive circuit architecture, simulation, optimization, and layout supervision, including layout verification and readiness for downstream testing.
• Prepare test plans for the testing team and support reliability and yield assessment through modeling and evaluation.
• Perform simulation to bench and bench-to-test correlations, including silicon-level and applications-level evaluation.
• Deliver clear, accurate documentation and communicate progress, risks, and results across cross-functional partners.

Skills

RFIC design

Analog IC design

CMOS technology

EDA tools

Tools

Cadence

Mentor

Siemens

Ansys

Job description

Our client, Semiconductor and Electronics is seeking a Principal RFIC Design Engineer IV to join their team. As a Principal RFIC Design Engineer IV, you will be part of the RF/Analog Design organization supporting RF and analog circuit block development. The ideal candidate will have hands-on RF and analog IC design depth, strong cross-functional communication, and a proven track record of circuit innovation and successful design releases which will align successfully in the organization.

Job Title:Principal RFIC Design Engineer IV

Location:San Jose, California (WD hybrid schedule: 3 days onsite, 2 WFH). Open to remote-US candidates working PST hours; flexible to relocate if converted to FTE.

Pay Range:$80

What's the Job?

• Own the design of high-performance RF and analog circuit blocks from transistor-level architecture through module-level implementation.
• Drive circuit architecture, simulation, optimization, and layout supervision, including layout verification and readiness for downstream testing.
• Prepare test plans for the testing team and support reliability and yield assessment through modeling and evaluation.
• Perform simulation to bench and bench to test correlation, including bench evaluation at silicon level and at applications level.
• Deliver clear, accurate documentation and communicate progress, risks, and results across cross-functional partners.

What's Needed?

• Hands-on design and development experience in RF and analog integrated circuits.
• Experience in at least one, preferably multiple, areas of full CMOS circuit design and development, including baseband amplifiers, low noise RF amplifiers, wide bandwidth amplifiers; mixers and up-/down-converters; high speed drivers and receivers, CDR circuits, equalizers; and power amplifiers.
• Demonstrated experience with 40nm and below CMOS technology.
• Track record of successful design releases and mass production readiness.
• Thorough knowledge of industry-standard EDA tools (Cadence, Mentor, Siemens, Ansys, or similar).

What's in it for me?

• Opportunity to contribute at the principal level on demanding RF/analog blocks with real performance and yield impact.
• A structured hybrid work model (3 days onsite, 2 WFH) with remote-US flexibility for candidates who can work PST hours.
• A 6-month assignment with intent to convert to FTE based on performance, budget, and ongoing business need.
• Regular working hours (40 hours/week, 8 hours/day, 5 days/week) with no overtime expected.
• Clear expectations around design execution, correlation, and documentation—so your work can translate directly into validated silicon.

Upon completion of waiting period consultants are eligible for:

• Medical and Prescription Drug Plans
• Vision Plan
• Health Savings Account
• Health Flexible Spending Account
• Dependent Care Flexible Spending Account
• Supplemental Life Insurance
• Short Term and Long Term Disability Insurance
• Business Travel Insurance
• Weekly Pay

About ManpowerGroup, Parent Company of: Manpower, Experis, Talent Solutions, and Jefferson Wells.

ManpowerGroup® (NYSE: MAN), the leading global workforce solutions company, helps organizations transform in a fast-changing world of work by sourcing, assessing, developing, and managing the talent that enables them to win. We develop innovative solutions for hundreds of thousands of organizations every year, providing them with skilled talent while finding meaningful, sustainable employment for millions of people across a wide range of industries and skills. Our expert family of brands – Manpower, Experis, Talent Solutions, and Jefferson Wells – creates substantial value for candidates and clients across more than 75 countries and territories and has done so for over 70 years. We are recognized consistently for our diversity - as a best place to work for Women, Inclusion, Equality and Disability and in 2023 ManpowerGroup was named one of the World's Most Ethical Companies for the 14th year - all confirming our position as the brand of choice for in-demand talent.