Lead Power Architect for AI SoC — Energy‑Efficient Edge

Velaura; Santa Clara (CA); On-site; USD 200,000 - 300,000; Full time

Benefits offered by this job

Equity compensation

Medical, dental, vision coverage

Flexible work arrangements

Paid time off

Job summary

Velaura is seeking a Power Management Architect to own the power architecture for the Physical AI SoC, spanning silicon, firmware, and platform software. You will define DVFS, power states, and power delivery networks to meet performance within tight power and thermal budgets.

You will lead cross-functional teams through architecture phases, tape-out, and production, shaping power policies and ensuring efficient field operation for AI and real-time workloads.

Qualifications

• 8+ years in power management, mixed-signal, or SoC architecture.
• Deep expertise in low-power techniques: multiple power domains, DVFS, clock/power gating, adaptive voltage scaling, retention, and power state management.
• Strong understanding of power delivery networks, PMICs, voltage regulation, and interacting with thermal and package constraints.
• Hands-on with power intent and low-power methodology (UPF/CPF) and power modeling across SoC design flow.
• Experience cross-collaborating across silicon design, firmware, and platform software to define/validate power policies.
• Bachelor’s or advanced degree in Electrical/Computing Eng or related field, or equivalent.
• Excellent written and verbal communication with mentoring track record.

Responsibilities

• Own the SoC power architecture: define power domains, DVFS, power states, and delivery network.
• Define dynamic/static power management techniques to maximize performance-per-watt for AI workloads.
• Model power budgets across use cases; drive PPA trade-offs with teams.
• Architect on-die power management and control subsystem and related firmware policies.
• Embed power intent (UPF) into design flow and validate through bring‑up.
• Define power/thermal management for real-world operation and safe operating limits.
• Establish standards, modeling methods, and mentor engineers across the org.

Skills

Power management

SoC architecture

UPF/CPF

DVFS

Power integrity

Cross-functional leadership

Mentoring engineers

Education

Electrical/Computer Engineering

Job description

Velaura is seeking a Power Management Architect to own the power architecture for the Physical AI SoC, spanning silicon, firmware, and platform software. You will define DVFS, power states, and power delivery networks to meet performance within tight power and thermal budgets.

You will lead cross-functional teams through architecture phases, tape-out, and production, shaping power policies and ensuring efficient field operation for AI and real-time workloads.