Lead FPGA Design Engineer for High-Speed Camera Systems

Teledyne Technologies Incorporated; Tucson (AZ); On-site; USD 120,000 - 170,000; Full time

Benefits offered by this job

Competitive compensation

Health, Dental, Vision

Paid vacation time

Paid sick time

Life insurance

Paid holidays

401(k) eligibility

Employee stock purchase plan

Educational tuition reimbursement

Job summary

Teledyne Photometrics is seeking an FPGA Design Engineer to lead the design and top-level integration of FPGA-based control systems for high-speed scientific cameras used in Life Science, Physical Science and Astronomy applications.

You will optimize digital modules with VHDL/Verilog, perform floor planning and timing closure, and integrate IP blocks and embedded processors while meeting power and speed targets. Collaboration with hardware and software teams is essential.

Qualifications

• MS degree in Electrical Engineering or a related field.
• 5+ years of FPGA RTL experience (VHDL/Verilog).
• Proven FPGA system integration including IP blocks and embedded processors.
• Experience with floor planning, synthesis, and timing closure.
• Familiarity with USB, UART, SPI, I2C, Ethernet protocols.

Responsibilities

• Design and develop FPGA-based digital systems.
• Drive top level integration, floor planning and timing closure.
• Integrate VHDL/Verilog modules, IP subsystems and embedded microprocessors.
• Develop and maintain system level simulation environments.
• Meet challenging power consumption and speed requirements.

Skills

FPGA RTL coding

System integration

High-speed interfaces

VHDL/Verilog

Floor planning

IP/SoC integration

Timing closure

Education

MS in Electrical Engineering

Tools

Intel Quartus

Xilinx Vivado

Intel Qsys / Platform Designer

Job description

Teledyne Photometrics is seeking an FPGA Design Engineer to lead the design and top-level integration of FPGA-based control systems for high-speed scientific cameras used in Life Science, Physical Science and Astronomy applications.

You will optimize digital modules with VHDL/Verilog, perform floor planning and timing closure, and integrate IP blocks and embedded processors while meeting power and speed targets. Collaboration with hardware and software teams is essential.