FPGA Design Engineer – High-Speed Camera Systems Stock Plan

FLIR; Tucson (AZ); On-site; USD 120,000 - 170,000; Full time

Benefits offered by this job

Competitive compensation

Excellent Health, Dental, Vision

Paid Vacation Time

Paid Sick Time

Life Insurance Benefits

401(k) Eligibility

Employee Stock Purchase Plan

Tuition Reimbursement

Job summary

Teledyne Photometrics is seeking an FPGA Design Engineer to lead design and top-level integration of FPGA embedded systems for high-speed scientific cameras used in Life Science, Physical Science and Astronomy.

Requires 5+ years of FPGA RTL experience (VHDL/Verilog) with Intel Quartus or Xilinx Vivado, plus strong system integration, floor planning and IP reuse. Work on cutting-edge imaging platforms with demanding performance targets.

Qualifications

• MS degree in Electrical Engineering required.
• 5+ years of FPGA RTL (VHDL/Verilog) module development with Intel Quartus (preferred) or Xilinx Vivado.
• Expertise in FPGA system integration with RTL modules, IP subsystems and embedded processors.
• Strong floor planning, synthesis and timing closure skills.
• Experience with FPGA system definition tools and high-speed interfaces (USB, Ethernet, SERDES).
• Citizenship: U.S. Citizen or Green Card holder.

Responsibilities

• Design and develop digital systems on FPGA.
• Drive top-level integration, floor planning and timing closure.
• Integrate VHDL/Verilog modules, IP subsystems and embedded microprocessors.
• Develop and maintain system-level simulation environments.
• Meet challenging power and speed requirements.

Skills

FPGA RTL

IP integration

System-level design

Floor planning

Timing closure

Embedded processors

USB interfaces

Education

MS degree in Electrical Engineering

Tools

Intel Quartus

Xilinx Vivado

Qsys/Platform Designer

Job description

Teledyne Photometrics is seeking an FPGA Design Engineer to lead design and top-level integration of FPGA embedded systems for high-speed scientific cameras used in Life Science, Physical Science and Astronomy.

Requires 5+ years of FPGA RTL experience (VHDL/Verilog) with Intel Quartus or Xilinx Vivado, plus strong system integration, floor planning and IP reuse. Work on cutting-edge imaging platforms with demanding performance targets.