Lead EV Electronics Design Engineer (Prototype to Production)

Rivian; Palo Alto (CA); On-site; USD 167,000 - 209,000; Full time

Job summary

Rivian is seeking an Electronic Design Engineer to own the electrical system design, bring-up, and validation for next-generation Rivian electric vehicles. You will lead from ground up to manufacturing, partnering with software and integration teams to ensure cohesive HW/SW integration across the stack.

Responsibilities include hands-on prototype hardware design, validation, and driving reliability through DFMEA and test planning.

Qualifications

• BS, MS, or PhD in electrical engineering or equivalent experience.
• Hardware design experience across analog, digital and mixed-signal domains.
• Familiarity with C programming and microcontroller peripherals; FW-hw collaboration.
• Knowledge of high-speed signal integrity and EMC requirements.

Responsibilities

• Own the hardware design and lead development of the vehicle electrical system from ground up.
• Hands-on design and validation of prototype hardware and debugging test vehicles.
• Develop and drive integration and validation plans for HW/SW stack.
• Collaborate with software and integration teams to ensure proper hardware/software interfaces.
• Support DFMEA and reliability reviews; drive design improvements.

Skills

Hardware design

Analog & digital design

Schematic design

PCB layout

FPGA development

C programming

SPI / I2C

Signal integrity

Test equipment

Cross-functional collaboration

Education

Advanced degree in electrical engineering

Tools

Spice

Matlab

PCB/FPGA development tools

Job description

Rivian is seeking an Electronic Design Engineer to own the electrical system design, bring-up, and validation for next-generation Rivian electric vehicles. You will lead from ground up to manufacturing, partnering with software and integration teams to ensure cohesive HW/SW integration across the stack.

Responsibilities include hands-on prototype hardware design, validation, and driving reliability through DFMEA and test planning.