Lead Embedded CPU PPA Architect: Power, Thermal & SoC

AMD; Santa Clara (CA); On-site; USD 210,000 - 320,000; Full time

Job summary

AMD in Santa Clara, CA is seeking a lead PPA Architect to ensure CPU Core & Cache complexes meet performance while operating within reliability and system platform constraints. This is a technical leadership role coordinating between CPU IP definition from the Cores design team and the Embedded BU’s usage model and platform impacts on power delivery and thermal management.

You will drive cross-functional alignment across architecture, physical design implementation, FW/BIOS, SIPI, and platform

Qualifications

• BS/MS in EE/CE (or equivalent) with 7-10 years of relevant experience.
• Strong understanding of SoC architecture fundamentals, power delivery and thermal management concepts.
• Demonstrated ability to lead cross-functional technical workstreams and drive reviews to closure.

Responsibilities

• Align product requirements with CPU IP and architecture constraints.
• Coordinate cross-functional reviews across SoC architecture, physical design, FW/BIOS, SIPI and platform teams.
• Drive power delivery, thermal management and platform definition to meet reliability and performance targets.

Education

BS/MS in EE/CE (or equivalent)

Job description

AMD in Santa Clara, CA is seeking a lead PPA Architect to ensure CPU Core & Cache complexes meet performance while operating within reliability and system platform constraints. This is a technical leadership role coordinating between CPU IP definition from the Cores design team and the Embedded BU’s usage model and platform impacts on power delivery and thermal management.

You will drive cross-functional alignment across architecture, physical design implementation, FW/BIOS, SIPI, and platform