Lead Digital RTL Design Engineer for Power ICs

Renesas Electronics Corp.

Texas

On-site

USD 140,000 - 210,000

Full time

13 days ago

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Job summary

Renesas Electronics Corp. is seeking a Senior Digital Design Lead to develop, verify, and optimize digital designs for advanced power management ICs in a pre- and post-silicon environment.

You will lead design blocks, write tests, mentor junior engineers, and present new tools to improve the design automation flow. A strong background in Verilog/SystemVerilog and hands-on leadership are essential for successful projects.

Qualifications

  • BSc/MSc in Electrical Engineering/Computer Engineering (EE/ECE) and 10+ years of relevant industry experience
  • Proficient in developing CDC / RDC / LINT clean designs in Verilog
  • Comfortable with debugging mixed-signal designs in System Verilog based test benches
  • Exposed to gate level simulation debug.

Responsibilities

  • Develop, debug, and verify digital designs in pre and post silicon environment
  • Write tests to verify bulk design intent as per specification.
  • Learn, develop and improve scripts to facilitate design automation flows.
  • Manage assigned design blocks in design requirements, architecture, and implementation
  • Research and present new tools in aid of design development process
  • Act as technical mentor for junior engineers.
  • Represent digital design as functional digital design lead in design projects.

Skills

Verilog
SystemVerilog
CDC/RDC/LINT
debugging
I2C/I3C/SPI/I2S
synthesis/STA/P&R
Python/Perl scripting
ARM Cortex-M
Cadence/Synopsys tools
leadership/mentoring

Education

BSc/MSc in Electrical Engineering/Computer Engineering (EE/ECE)

Tools

Cadence
Synopsys

Job description

Renesas Electronics Corp. is seeking a Senior Digital Design Lead to develop, verify, and optimize digital designs for advanced power management ICs in a pre- and post-silicon environment.

You will lead design blocks, write tests, mentor junior engineers, and present new tools to improve the design automation flow. A strong background in Verilog/SystemVerilog and hands-on leadership are essential for successful projects.

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