Lead ASIC/SoC Design Engineer — PPA & Performance

Chelsea Search Group; Minneapolis (MN); On-site; USD 150,000 - 210,000; Full time

Job summary

Chelsea Search Group is seeking an experienced ASIC Chip Lead and Design Engineer in Minneapolis, MN. You will design complex digital ASICs from concept to silicon, collaborating across architecture, verification, physical design and applications teams to deliver high-performance, power-efficient solutions.

The role demands hands-on leadership in RTL design, chip architecture, constraints, and verification, with exposure to radiation-hardened design or analog/mixed-signal a plus.

Qualifications

• BSEE/MSEE or equivalent.
• 10+ years of direct industry experience with ASIC and/or SoC design.
• Proficiency in Synopsys Design Compiler and other EDA tools.
• Strong understanding of digital design principles.
• Familiarity with RISC architectures (e.g., ARM, MIPS).
• Excellent problem-solving skills and attention to detail.
• A strong background in RTL based digital IC design using Verilog/SystemVerilog.
• Proven track record of first-pass successes.
• A self-starter with the ability to assume leadership roles.
• Ability to work well in a diverse team environment.
• Willingness to mentor junior engineers.
• Experience with industry standard development tools and methodologies.

Responsibilities

• Lead the architectural design of ASICs based on high-level requirements and block diagrams.
• Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs and optimize for area, power, and performance.
• Develop timing constraints for the entire chip and coordinate with physical design for place-and-route.
• Constrain and verify RISC processors within the chip, optimizing performance and power.
• Collaborate with physical design on floorplanning, placement, and routing.
• Assist verification by creating testbenches and ensuring functionality.
• Follow modern revision-control practices in a multi-site design team.

Skills

Digital design

Verilog/SystemVerilog

UNIX/Linux

Scripting

C/C++

Education

BSEE/MSEE or equivalent

Tools

Synopsys Design Compiler

EDA tools

Job description

Chelsea Search Group is seeking an experienced ASIC Chip Lead and Design Engineer in Minneapolis, MN. You will design complex digital ASICs from concept to silicon, collaborating across architecture, verification, physical design and applications teams to deliver high-performance, power-efficient solutions.

The role demands hands-on leadership in RTL design, chip architecture, constraints, and verification, with exposure to radiation-hardened design or analog/mixed-signal a plus.