Lead ASIC DFT Staff Engineer

Rapsys Technologies Pte Ltd.; California (MO); Hybrid; USD 150,000 - 210,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Rapsys Technologies Pte Ltd. is seeking a Lead ASIC DFT Staff Engineer to drive testability for advanced ASICs. You will architect and implement complex DFT strategies, oversee ATPG/BIST/boundary scan, and collaborate across teams to plan and execute tests.

You will mentor engineers, refine verification flows, and support silicon bring-up post-fabrication, leveraging Perl/Python/TCL scripting to enhance efficiency. This hybrid role offers flexible office and remote work in California.

Qualifications

• Minimum 12 years’ hands-on experience in ASIC DFT engineering.
• Deep knowledge of scan insertion, ATPG tools, BIST, boundary scan.
• Proven track record leading complex DFT projects from concept to production.
• Strong communication and teamwork skills.
• Expertise in scripting languages (Perl/Python/TCL) is a plus.

Responsibilities

• Architect and implement complex DFT strategies for cutting-edge ASIC designs.
• Oversee scan insertion, ATPG, BIST, boundary scan, and related methodologies.
• Collaborate with cross-functional teams on test planning and execution.
• Review and optimize verification flows for quality and efficiency.
• Mentor junior engineers in best practices and technical skills.
• Support silicon bring-up and debug processes post-fabrication.

Skills

DFT engineering

Scan insertion

ATPG tools

BIST

Boundary scan

Scripting (Perl)

Scripting (Python)

Scripting (TCL)

Leadership / mentoring

Communication skills

Tools

ATPG tools

Perl scripting

Python scripting

TCL scripting

Job description

🌟 We're Hiring: Lead ASIC DFT Staff Engineer! 🌟

Join our innovative team as a Lead ASIC DFT Staff Engineer and drive the design for testability of advanced ASICs. We’re looking for an expert with extensive experience to lead DFT architecture, implementation, and verification, ensuring robust and efficient test solutions that meet industry standards.

📍 Location: California, United States
⏰ Work Mode: Flexible office & remote
💼 Role: Lead ASIC DFT Staff Engineer

What You'll Do:
🔧 Architect and implement complex DFT strategies for cutting-edge ASIC designs
🛠 Oversee scan insertion, ATPG, BIST, boundary scan, and related methodologies
📈 Collaborate with cross-functional teams on test planning and execution
📝 Review and optimize verification flows for quality and efficiency
🚀 Mentor junior engineers in best practices and technical skills
📑 Support silicon bring-up and debug processes post-fabrication

What We're Looking For:
✅ Minimum 12 years’ hands-on experience in ASIC DFT engineering
✅ Deep knowledge of scan insertion, ATPG tools, BIST, boundary scan
✅ Proven track record leading complex DFT projects from concept to production
✅ Strong communication and teamwork skills
✅ Expertise in scripting languages (Perl/Python/TCL) is a plus

Eager to make a difference? 🚀 Apply now and help shape tomorrow’s technology!