Lead AI-Driven CPU Core Verification Testbench

Tenstorrent University Jobs; Santa Clara (CA); Hybrid; USD 140,000 - 210,000; Full time

Job summary

Tenstorrent is seeking a senior CPU verification engineer to own core-level testbench development for high-performance out-of-order RISC-V CPUs. The role is hybrid and based in Austin, TX or Santa Clara, CA.

You will lead CVM-based verification, develop UVM, C/C++ stimulus, and AI-assisted workflows, collaborating across design, DV, emulation, and post-silicon teams to improve debug, coverage, and reusable testbenches.

Qualifications

• 8+ years in CPU verification or testbench development.
• Hands-on ownership of CPU core-level testbenches.
• Experience with high-performance out-of-order CPU microarchitecture.

Responsibilities

• Lead hands-on CPU core-level testbench development for high-performance OOO RISC-V cores.
• Own and evolve CVM-based verification methodology and reusable testbenches.
• Plan and drive functional verification for CPU core features and ISA behavior.
• Develop UVM, C/C++ stimulus, and models for RISC-V extensions and IOMMU.
• Debug regressions, close coverage, and improve testbenches across environments.
• Create testbench tooling that combines Python orchestration with AI-assisted triage.

Skills

CPU verification

Testbench development

CVM methodology

UVM experience

RTL & debug

Python orchestration

AI-assisted verification

Tools

CVM

UVM

Python

Job description

Tenstorrent is seeking a senior CPU verification engineer to own core-level testbench development for high-performance out-of-order RISC-V CPUs. The role is hybrid and based in Austin, TX or Santa Clara, CA.

You will lead CVM-based verification, develop UVM, C/C++ stimulus, and AI-assisted workflows, collaborating across design, DV, emulation, and post-silicon teams to improve debug, coverage, and reusable testbenches.