Lead Advanced Technology Researcher – RF/AMS

Per International; Indiana; Hybrid; USD 180,000 - 260,000; Full time

Job summary

Per International in Indiana seeks a Lead/Senior Research Scientist to spearhead exploratory RF and AMS research with a 3–10 year horizon. You will own architecture concept, feasibility proofs, and silicon tape-outs, plus hands-on lab validation of your designs.

You will publish findings and contribute to IP while collaborating with top academic partners and internal R&D teams across disciplines. A PhD and strong publication record are required.

Qualifications

• Education: PhD in Electrical Engineering with a specialized RF/AMS focus.
• Proven publication track record and/or granted patents.
• Deep high-frequency design knowledge (sub-20 GHz) and RF building blocks.
• Hands-on tape-out experience beyond simulations.
• Direct experience with modern CMOS/FinFET nodes and lab measurement.
• Experience collaborating with academia and industry partners.

Responsibilities

• Architectural innovation for RF/mmWave and AMS capable of long-horizon deployment.
• Drive end-to-end IC design from feasibility to layout supervision.
• Execute silicon tape-outs using FinFET CMOS technologies.
• Perform hands-on silicon characterization and bring-up of designs.
• Generate IP and publish findings at top conferences (ISSCC/VLSI/JSSC).
• Bridge internal R&D with external academic collaborators.

Skills

RF design

Chip tape-out

Silicon measurement

Academic collaboration

Education

PhD in Electrical Engineering

Tools

RF lab equipment

CMOS/FinFET process

Job description

We are partnering with a tier-1 global semiconductor leader to expand a highly specialized, advanced research hub in Indiana, United States. Deeply integrated with top-tier academic research networks, this group operates at the critical intersection of exploratory research and commercial product R&D. Functioning much like a well-funded stealth startup within a massive global enterprise, the team is dedicated to inventing, exploring, and prototyping next-generation RF and analog mixed-signal (AMS) architectures looking 3 to 10 years into the future.

The Role

This is not a standard product-development role executing next year's roadmap. We are seeking a hybrid visionary-an engineer who possesses the forward-looking mindset of an academic researcher combined with the battle-tested, hands-on execution skills of an industry veteran.

As a Lead/Senior Research Scientist, you will spearhead exploratory research in sub-20 GHz architectures and next-generation wireless circuits. You will own the full lifecycle of innovation: conceptualizing new architectures, proving feasibility, driving advanced FinFET tape-outs, and validating your designs through rigorous physical silicon characterization in the lab.

Key Responsibilities

• Architectural Innovation: Lead the exploration and development of novel RF/mmWave and AMS architectures targeted for 3-10 year deployment horizons.
• End-to-End IC Design: Drive complex designs from early mathematical feasibility and system-level architecture through full IC implementation and layout supervision.
• Advanced Tape-Outs: Execute complete silicon tape-outs utilizing advanced CMOS process technologies (specifically FinFET).
• Silicon Characterization: Take a hands-on approach in the lab to perform physical measured silicon characterization and bring-up of your own designs.
• IP & Publication Generation: Continuously contribute to the company’s intellectual property portfolio and present findings at top-tier industry conferences (e.g., ISSCC, VLSI, JSSC).
• Ecosystem Collaboration: Act as a bridge between internal commercial R&D teams and external academic partners to leverage emerging research.

Required Qualifications

• Education: PhD in Electrical Engineering with a highly specialized focus on RFIC, mmWave, or AMS circuit design.
• Proven Innovation: A continuous, recent track record of primary-author publications at top-tier conferences (ISSCC, VLSI) and/or a robust portfolio of granted patents.
• Domain Expertise: Deep technical knowledge of high-frequency design (sub-20 GHz) and core building blocks such as ADCs/DACs, SerDes, PLLs/CDRs, or high-speed Analog Front-Ends (AFE).
• Hands-On Execution: Demonstrable history of taking chips all the way from concept to successful tape-out, rather than stopping at simulation.
• Process Node Experience: Direct, hands-on experience designing and taping out in advanced CMOS/FinFET nodes.
• Lab Proficiency: Extensive experience with RF lab equipment and physical silicon measurement methodologies.