Interface IP DV Engineer for High-Performance ASICs

Etched.ai, Inc.; San Jose (CA); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical, dental, and vision packages

$500 credit for waiving medical benefits

Housing subsidy of $2k per month

Relocation support

Daily lunch and dinner in office

Job summary

Etched.ai, Inc. in San Jose is seeking a Design Verification Engineer for their Interface IP DV team. This role involves ownership of IP subsystems like PCIe and Ethernet, developing verification environments using SystemVerilog/UVM, and ensuring compliance with specifications. Candidates should have over 5 years in design verification, enjoy tackling complex challenges, and thrive in fast-paced environments. The position offers extensive benefits, including a housing subsidy for local employees and relocation support for new hires.

Qualifications

• 5+ years of design verification experience.
• Experience with verification methodologies like SystemVerilog/UVM.
• Ability to handle complex verification challenges.

Responsibilities

• End to end ownership of IP subsystems like PCIe, Ethernet, CPU.
• Develop verification environments for functional correctness.
• Collaborate with teams to validate integration of external IPs.

Skills

Design verification experience

SystemVerilog/UVM

Standard IP interfaces

Cross-functional collaboration

Job description

Etched.ai, Inc. in San Jose is seeking a Design Verification Engineer for their Interface IP DV team. This role involves ownership of IP subsystems like PCIe and Ethernet, developing verification environments using SystemVerilog/UVM, and ensuring compliance with specifications. Candidates should have over 5 years in design verification, enjoy tackling complex challenges, and thrive in fast-paced environments. The position offers extensive benefits, including a housing subsidy for local employees and relocation support for new hires.