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Broadcom is seeking an R&D Design Engineer for the design and physical implementation of high performance ASICs. You will work on digital PD of multi-hundred-million-gate chips and provide technical support to customers while advancing EDA tool usage in deep submicron nodes.
The role emphasizes hands-on experience with Place&Route, Verilog, STA, DRC/LVS, and scripting in Tcl/Perl/Python, in a UNIX/Linux environment. Colorado-based PM considerations apply.
R&D Design Engineering position available in design and physical implementation of high performance System-On-Chip ASICs. Key competencies required are:
The annual base salary range for this position is USD 61,900.00 To USD 99,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
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