Hybrid Senior Staff Engineer — Foundry Tech & Yield

Intel; Santa Clara (CA); Hybrid; USD 156,000 - 255,000; Full time

Benefits offered by this job

Health benefits

Stock bonuses

Vacation

Job summary

Intel's LTD group leads end-to-end MPW and NPI efforts across the full manufacturing flow, guiding customers from design tape-out through pre-silicon evaluation, testing, silicon qualification, and ramp to production.

The role serves as the primary customer interface for wafer status, device performance, and process changes, coordinating across engineering teams to ensure timely delivery in a hybrid work model across multiple US sites.

Qualifications

• Master's degree with 6+ years of relevant industry experience, or PhD with 4+ years of relevant industry experience.
• Degrees in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related engineering or physical science discipline.
• 4+ years of experience in Product/Process Integration engineering, Device engineering, or Yield engineering.

Responsibilities

• Drive end-to-end MPW and New Product Introduction (NPI) execution across the full manufacturing flow, front-end to far-backend, ensuring quality and on-time delivery.
• Serve as the primary customer-facing interface for wafer status, silicon health, technical issues, process changes, and execution alignment.
• Own identification and resolution of customer-specific integration challenges.
• Drive enablement of customer-specific requirements through cross-functional coordination.
• Serve as the primary customer interface for device performance, including manufacturing readiness reviews and post-silicon characterization, and drive device performance optimization.

Skills

Strong communication

Leadership

Stakeholder management

Customer engagement

Education

Master's degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or related

PhD with 4+ years of experience

Job description

Intel's LTD group leads end-to-end MPW and NPI efforts across the full manufacturing flow, guiding customers from design tape-out through pre-silicon evaluation, testing, silicon qualification, and ramp to production.

The role serves as the primary customer interface for wafer status, device performance, and process changes, coordinating across engineering teams to ensure timely delivery in a hybrid work model across multiple US sites.