Hybrid Senior Digital Design Engineer SoC/RTL, Stock Options

Powerlattice Technologies Inc.; Chandler (AZ); Hybrid; USD 150,000 - 200,000; Full time

Benefits offered by this job

Stock option grant

Health, dental, vision, and 401(k)

Job summary

Powerlattice Technologies Inc. seeks an experienced Senior Digital Design Engineer to own digital blocks from microarchitecture through RTL development, integration, and implementation.

You will collaborate with verification, physical design, and DFT teams in a startup environment where critical contributions drive product success. The role demands hands-on RTL coding, strong debugging skills, and leadership at Staff level, with hybrid work including onsite presence in Vancouver, WA or Chandler,

Qualifications

• Bachelor's or Master's degree in Electrical/Computer Engineering or related field.
• 6+ years of digital IC design experience.
• Strong RTL development experience using Verilog or SystemVerilog.

Responsibilities

• Develop microarchitecture for assigned digital blocks and subsystems.
• Design, code, and maintain synthesizable RTL.
• Evaluate design tradeoffs for performance, power, area, and testability.
• Integrate RTL into larger subsystems and SoC environments.
• Support lint, CDC/RDC, synthesis, and design quality checks.
• Collaborate with physical design teams to resolve implementation issues.
• Assist with timing constraint development and timing closure activities.
• Support LEC and post-silicon debugging.

Skills

RTL development

Verilog

SystemVerilog

digital IC design

SoC/ASIC

clocking/reset

timing closure

debugging

collaboration

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Synopsys

Cadence

Job description

Powerlattice Technologies Inc. seeks an experienced Senior Digital Design Engineer to own digital blocks from microarchitecture through RTL development, integration, and implementation.

You will collaborate with verification, physical design, and DFT teams in a startup environment where critical contributions drive product success. The role demands hands-on RTL coding, strong debugging skills, and leadership at Staff level, with hybrid work including onsite presence in Vancouver, WA or Chandler,