HSIO Validation Engineer: PCIe/AI Interface Expert

Advanced Micro Devices; Santa Clara (CA); Hybrid; USD 140,000 - 190,000; Full time

Job summary

Advanced Micro Devices in Santa Clara, CA seeks a High-Speed IO (HSIO) Validation Engineer to validate and debug high-speed interfaces across CPU and GPU platforms. You will work with PHY design, SI/PI, firmware, and platform teams to execute validation plans and drive root-cause analysis of silicon- and system-level issues.

You will validate PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other technologies; support post-silicon bring-up, characterization, and interoperability testing; and

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 5+ years of experience in high-speed IO, silicon validation, system validation, or related areas.
• Experience with high-speed serial interfaces such as PCIe, CXL, Ethernet, UALink, or similar technologies.

Responsibilities

• Execute validation plans for high-speed IO interfaces such as PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other emerging technologies.
• Support post-silicon bring-up, characterization, compliance testing, margining, and interoperability validation across multiple platforms.
• Collaborate with design, architecture, firmware, board, and test teams to investigate and resolve high-speed interface issues.
• Develop and enhance test automation, validation scripts, and data analysis tools to improve validation efficiency and coverage.
• Perform electrical- and protocol-level debug using oscilloscopes, BERTs, protocol analyzers, and other lab equipment.
• Analyze signal integrity, power integrity, and link training behavior to identify root causes and drive corrective actions.

Skills

Python

C/C++

Signal integrity

Automation

Education

Bachelor's or Master's degree in Electrical/Computer Engineering or related field

Tools

Oscilloscopes

BERTs

VNAs

Protocol analyzers

Job description

Advanced Micro Devices in Santa Clara, CA seeks a High-Speed IO (HSIO) Validation Engineer to validate and debug high-speed interfaces across CPU and GPU platforms. You will work with PHY design, SI/PI, firmware, and platform teams to execute validation plans and drive root-cause analysis of silicon- and system-level issues.

You will validate PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other technologies; support post-silicon bring-up, characterization, and interoperability testing; and