HSIO Validation Engineer for PCIe/AI Platforms

Socket.dev; Santa Clara (CA); On-site; USD 140,000 - 200,000; Full time

Job summary

AMD in Santa Clara, CA is seeking a High-Speed IO Validation Engineer to validate and debug high-speed interfaces across CPU and GPU platforms. You will work with PHY design, SI/PI, firmware, and platform teams to execute validation plans and drive root-cause analysis of silicon- and system-level issues.

You will perform electrical- and protocol-level debugging, develop test automation, analyze signal integrity, and document findings while contributing to evolving validation methodologies and

Qualifications

• Bachelor's or Master’s degree in Electrical/Computer Engineering or related field.
• 5+ years of experience in high-speed IO, silicon validation, or system validation.
• Strong programming/scripting in Python/C/C++ for automation.
• Experience with PCIe, CXL, Ethernet, UALink, or similar interfaces.

Responsibilities

• Execute validation plans for high-speed IO interfaces such as PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet.
• Support post-silicon bring-up, characterization, compliance testing, margining, and interoperability validation.
• Collaborate with design, architecture, firmware, board, and test teams to investigate and resolve high-speed interface issues.
• Develop and enhance test automation, validation scripts, and data analysis tools to improve validation efficiency and coverage.
• Perform electrical- and protocol-level debug using oscilloscopes, BERTs, protocol analyzers, and other lab equipment.
• Analyze signal integrity, power integrity, and link training behavior to identify root causes and drive corrective actions.
• Document validation findings, debug results, and recommendations, and communicate status to project stakeholders.
• Contribute to the continuous improvement of validation methodologies, BKMs, and lab infrastructure.

Skills

High-speed IO

Python/C/C++ scripting

Signal integrity

Lab measurement equipment

Education

Bachelor’s or Master’s degree in Electrical/ Computer Engineering

Tools

Oscilloscopes

BERTs

VNAs

Protocol analyzers

Job description

AMD in Santa Clara, CA is seeking a High-Speed IO Validation Engineer to validate and debug high-speed interfaces across CPU and GPU platforms. You will work with PHY design, SI/PI, firmware, and platform teams to execute validation plans and drive root-cause analysis of silicon- and system-level issues.

You will perform electrical- and protocol-level debugging, develop test automation, analyze signal integrity, and document findings while contributing to evolving validation methodologies and