High-Speed Hardware Engineer — PCIe Gen5 & Failure Analysis

Realign Llc; San Jose (CA); On-site; USD 140,000 - 180,000; Full time

Job summary

Realign Llc in San Jose, CA is seeking an experienced Hardware Engineer to lead high-speed complex hardware design and failure analysis. You will work on networking products with SERDES >25G, PCIe Gen5+, DDR5 and NVMe/PCIe interfaces, and contribute to power supply architectures.

You will perform board bring-up, hardware validation, and qualification testing. Candidates should have 8+ years of hands-on hardware design experience, Cadence CAD workflows, and strong SI/PI skills.

Qualifications

• Must have 8+ years in hardware design, with networking or equivalent complex products.
• High speed interfaces: SERDES >25G, PCIe Gen5+, and low-speed interfaces like SPI, I2C, MDIO, SMB.
• Experience with DDR5, NVMe/PCIe SSD interfaces and optical interfaces (QSFP/QSFP DD/OSFP) would be an advantage.

Responsibilities

• Design and analyze high-speed hardware and failure scenarios.
• Lead board bring-up and hardware validation testing.
• Conduct qualification testing against functional specifications.
• Collaborate with mechanical and thermal teams to ensure product reliability.

Skills

High Speed SERDES

PCIe Gen5+

Hardware design

Board bring-up

Signal Integrity

Failure analysis

Testing & validation

Power supply design

Networking hardware

Education

Bachelor's degree in Electrical Engineering

MS preferred

Tools

Cadence

Cadence tool chain

Job description

Realign Llc in San Jose, CA is seeking an experienced Hardware Engineer to lead high-speed complex hardware design and failure analysis. You will work on networking products with SERDES >25G, PCIe Gen5+, DDR5 and NVMe/PCIe interfaces, and contribute to power supply architectures.

You will perform board bring-up, hardware validation, and qualification testing. Candidates should have 8+ years of hands-on hardware design experience, Cadence CAD workflows, and strong SI/PI skills.