High-Speed Analog/Mixed-Signal Design Engineer

ovt; Santa Clara (CA); On-site; USD 157,000 - 160,000; Full time

Job summary

ovt in California seeks an Analog Mixed-Signal Design Engineer to design, characterize embedded analog circuits including high-speed I/O, SerDes, PLLs, and clocking networks.

You will debug RTL-level signal synchronization, evaluate performance across process variation and temperature, and collaborate with system and test engineers on image sensor interfaces. Proficiency with Cadence tools and HSPICE/Spectre is required.

Qualifications

• Master's degree in Electrical Engineering or related field.
• One year of experience as an Analog Design Engineer.

Responsibilities

• Design, develop, and characterize embedded analog circuits (high-speed I/O, SerDes, FIFO, CDR, PLL).
• Debug RTL level signal synchronization, clock tree, and cross-domain clocks.
• Evaluate performance across process variation, temperature, and noise.
• Analyze layout parasitics and signal integrity using post-layout simulations.
• Collaborate with system/test engineers on image sensor interfaces and clocking.
• Perform layout support, optimization, and Cadence-based simulations.
• Transistor-level IC design and simulation for clock distribution, serializer circuits, and bias/reference circuits.

Skills

Python

C Shell

Scilab

RTL verification

Education

Master's degree in Electrical Engineering

Tools

Cadence Virtuoso

Cadence Simvision

Cadence Layout

HSPICE

Spectre

EZWave

Cadence Viva

EDA scripting

Job description

ovt in California seeks an Analog Mixed-Signal Design Engineer to design, characterize embedded analog circuits including high-speed I/O, SerDes, PLLs, and clocking networks.

You will debug RTL-level signal synchronization, evaluate performance across process variation and temperature, and collaborate with system and test engineers on image sensor interfaces. Proficiency with Cadence tools and HSPICE/Spectre is required.