Head of CPU Cache Subsystem Design

Google; Portland (OR); On-site; USD 240,000 - 333,000; Full time

Job summary

Google is seeking a senior CPU design lead to drive micro-architecture and RTL for next‑gen CPU subsystems. You will guide a front‑end design team and collaborate with architecture, software, verification, power, DFT, and physical design to deliver high‑quality RTL on schedule.

Be part of a team delivering custom silicon powering a wide range of Google products. The role demands 15 years in CPU design, strong leadership, and a track record of delivering efficient, high‑performance cores.

Qualifications

• Minimum Bachelor's degree in EE, CS, or equivalent.
• 15 years in CPU design, including load-store logic and caches.
• Experience leading processor subsystems and teams.

Responsibilities

• Lead and manage a CPU design team focused on micro-architecture and RTL.
• Review and propose micro-architecture enhancements with cross-functional partners.
• Deliver RTL designs on schedule meeting production quality targets.
• Collaborate with verification, power, DFT, and physical design teams.
• Drive decisions on design options balancing performance, power, and area.

Skills

CPU design

RTL design

Micro-architecture

Team leadership

Quality checks (Lint/CDC/RDC)

Education

Bachelor's degree in Electrical Engineering/CS

Job description

Google is seeking a senior CPU design lead to drive micro-architecture and RTL for next‑gen CPU subsystems. You will guide a front‑end design team and collaborate with architecture, software, verification, power, DFT, and physical design to deliver high‑quality RTL on schedule.

Be part of a team delivering custom silicon powering a wide range of Google products. The role demands 15 years in CPU design, strong leadership, and a track record of delivering efficient, high‑performance cores.