Hardware Design and Failure Analysis Engineer

TekCommands Inc.; San Jose (CA); On-site; USD 180,000 - 250,000; Full time

Job summary

TekCommands Inc. in San Jose, CA is seeking a Senior Hardware Design and Failure Analysis Engineer to drive end-to-end hardware development and failure investigations.

You will evaluate high-speed interfaces, perform power and signal integrity analyses, and mentor teams across engineering and supplier partners. Acting as the technical lead, you will direct external silicon suppliers and analytical labs through root-cause analysis, recommend design improvements, and document findings for

Qualifications

• B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.
• Experience leading hardware quality or reliability taskforces for hyperscale cloud providers (e.g., Microsoft, Meta, Google, AWS) is preferred.
• Knowledge of advanced packaging technologies (chiplets, 2.5D/3D ICs, CoWoS) and silicon failure mechanisms.
• Proficiency in writing custom Python or C automation tools to recreate corner-case/intermittent hardware race conditions.

Responsibilities

• Lead hardware design and failure analysis activities across complex high-speed systems.
• Direct external silicon suppliers and analytical laboratories through root-cause analysis and recommended design improvements.
• Articulate complex technical findings to cross-functional leaders and enterprise customers.

Skills

Hardware design

Failure analysis

System-level analysis

Power integrity

Signal integrity

Python

C automation

Automation scripting

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

Verilog/VHDL

SPICE/AMS

Job description

Hardware Design and Failure Analysis Engineer

Education & Experience: B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.

High-Speed Hardware Expertise: Well versed in modern system architectures (PCIe Gen4/5/6, DDR4/5, HBM, 56G/112G/224G SerDes, optical transceivers).

Power & Signal Integrity: Proven ability to debug complex power distribution network issues/multi-phase VRM transient droop, PMBus/SVID telemetry, switching noise) and high-speed signal integrity anomalies.

Supplier Engagement: Hands-on experience directing external silicon suppliers and analytical Laboratories through component-level physical FA.

Communication: Strong executive presence with proven capability to articulate complex technical findings to cross-functional leaders and enterprise customers.

Preferred Qualifications

Experience leading hardware quality or reliability taskforces for hyperscale cloud service providers (e.g., Microsoft, Meta, Google, AWS).

Knowledge of advanced packaging technologies (chiplets, 2.5D/3D ICs, CoWoS) and silicon failure mechanisms.

Proficiency in writing custom Python or C automation tools to recreate corner-case/intermittent hardware race conditions.

Skills: EIS : ASIC Ciruit Design - Analog and Mixed Signal IC Circuit design~EIS : Thermal Analysis~EIS : Embedded Digital Hardware Design and Development