Senior Hardware Design & Failure Analysis Engineer (San Jose)

Hallmark Global Solutions Ltd; San Jose (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Hallmark Global Solutions Ltd in San Jose, CA is seeking a Hardware Design and Failure Analysis Engineer. The role requires a BS/MS in EE/CE/MSE with 10+ years of hardware engineering and system-level failure analysis, focusing on robust board design.

You will tackle PCIe Gen4/5/6, DDR4/5, HBM, SerDes, optical transceivers, and power/signal integrity issues, coordinating with external silicon suppliers and labs, and communicating findings to executives.

Qualifications

• 10+ years of hardware engineering, board design, or system-level failure analysis.
• PCIe Gen4/5/6, DDR4/5, HBM, SerDes, optical transceivers.
• Strong communication and cross-functional leadership.

Responsibilities

• Lead hardware failure analysis and root-cause investigations.
• Direct external silicon suppliers and analytical labs for FA.
• Communicate complex findings to executives and cross-functional teams.
• Lead hardware quality or reliability task forces for hyperscale cloud providers.

Skills

High-Speed Hardware Architecture

Power & Signal Integrity

Supplier Engagement

Communication to Executives

Python Automation

Education

B.S./M.S. in Electrical/Computer Engineering or related field

Tools

Python

C Programming

Job description

Hallmark Global Solutions Ltd in San Jose, CA is seeking a Hardware Design and Failure Analysis Engineer. The role requires a BS/MS in EE/CE/MSE with 10+ years of hardware engineering and system-level failure analysis, focusing on robust board design.

You will tackle PCIe Gen4/5/6, DDR4/5, HBM, SerDes, optical transceivers, and power/signal integrity issues, coordinating with external silicon suppliers and labs, and communicating findings to executives.