Hands-on ASIC Engineer Intern: Design & Verification

Hewlett Packard Enterprise Development LP; Sunnyvale (CA); On-site; USD 48,000 - 63,000; Full time

Job summary

Hewlett Packard Enterprise invites students pursuing a Bachelor’s or Master’s in Electrical, Computer Engineering or Computer Science to join its ASIC team as an intern. The role is onsite in California, with mentorship from senior engineers in ASIC Design, Verification, or Tools & Methodologies.

You will gain hands-on experience in architecture investigations, SystemVerilog RTL, testbenches, and automation to accelerate development.

Qualifications

• Pursuing Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• Coursework in Digital Logic Design, Computer Architecture, or VLSI Design is highly desirable.
• Familiarity with ASIC concepts through academic projects or internships is a plus.

Responsibilities

• Participate in ASIC architecture investigation tasks, including evaluating design trade-offs and performance analysis.
• Create detailed functional and micro-architectural specifications.
• Assist in RTL design using SystemVerilog, ensuring functionality, performance, and power goals.
• Support synthesis, linting, and design reviews.
• Develop and maintain testbenches using SystemVerilog and UVM.
• Write test plans, assertions, create functional coverage models, and debug simulation failures.
• Contribute to regression setup and results analysis.
• Participate in emulation activities for pre-silicon validation.
• Contribute to automation to accelerate ASIC development processes, flow improvements, and EDA tool evaluations.
• Develop utilities to enhance productivity and improve design/verification processes.
• Work with EDA tools for physical design, including synthesis, place-and-route, timing analysis, and sign-off flows.
• Support Design-for-Test (DFT) methodology development and integration.

Skills

SystemVerilog

UVM

Python

C++

ASIC design flow

EDA tools

problem solving

communication

time management

learning mindset

networking/ML/ architectures

Education

Bachelor's or Master's in EE/CE/CS

Digital Logic / Computer Architecture / VLSI coursework

ASIC concepts via projects/internships

Tools

EDA tools

Place-and-route tools

Job description

Hewlett Packard Enterprise invites students pursuing a Bachelor’s or Master’s in Electrical, Computer Engineering or Computer Science to join its ASIC team as an intern. The role is onsite in California, with mentorship from senior engineers in ASIC Design, Verification, or Tools & Methodologies.

You will gain hands-on experience in architecture investigations, SystemVerilog RTL, testbenches, and automation to accelerate development.