GPU Front-End Engineer: Power, Performance & Design

Apple Inc.; Austin (TX); Hybrid; USD 120,000 - 180,000; Full time

Job summary

Apple Inc. in Austin, Texas, seeks a GPU design engineer to work with Front-End and Physical Design teams to optimize performance, power and area for next-gen GPUs. You will analyze standard cells, memory IP, and design custom cells, while collaborating with power teams to reduce power consumption across architecture and gate-level design.

40 hours/week. Requires a Master’s degree in EE or related field with at least 3 years of experience and strong proficiency with industry tools for physical

Qualifications

• Master’s degree or foreign equivalent in Computer and Electrical Engineering or related field.
• 3 years of experience with threshold voltage, power, device variation, parasitics, noise, EA and timing concepts.
• Proficient with Python, Perl or TCL for execution, analysis and debugging of designs.
• Experienced with Innovus/ICC physical design tools to meet PPA targets.
• Familiar with Tempus/Primetime timing-closure for performance and electrical needs.
• Understanding RTL synthesis to map RTL to gates meeting function and PPA.
• Knowledge of Low Power design concepts to optimize PPA.
• Ability to analyze design data and extract meaningful insights.

Responsibilities

• Drive methodology changes to improve performance, power and area for next-gen GPU designs.
• Analyze standard cell and memory hard-IP offerings and recommend usage to FE/PD teams.
• Drive design of custom cells tailored for GPU design requirements.
• Collaborate with power teams to analyze GPU power and recommend reductions.

Skills

GPU architecture

Scripting languages

Physical design tools

Timing closure tools

RTL synthesis

Low power design

Data analysis

Education

Master's degree in EE/related field

Tools

Innovus

ICC

Tempus

Primetime

Synopsys

Cadence

Mentor

Job description

Apple Inc. in Austin, Texas, seeks a GPU design engineer to work with Front-End and Physical Design teams to optimize performance, power and area for next-gen GPUs. You will analyze standard cells, memory IP, and design custom cells, while collaborating with power teams to reduce power consumption across architecture and gate-level design.

40 hours/week. Requires a Master’s degree in EE or related field with at least 3 years of experience and strong proficiency with industry tools for physical