GPU Emulation/Verification Engineer

WinMax Systems Corporation

Mountain View (CA)

On-site

USD 80,000 - 120,000

Full time

14 days+

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Job summary

WinMax Systems Corporation is seeking an engineer to assist in the bring-up of GPU RTL models on an emulation platform. This role includes supporting verification and regression teams, maintaining infrastructure for debugging, and utilizing emulation platforms for characterization.

The ideal candidate will have at least a BS or MS in Electrical Engineering or Computer Science, 3+ years in verification or design, and proficiency in System Verilog and scripting languages such as Python.

Qualifications

  • Minimum 3 years experience in verification or design.
  • Proficient in System Verilog and scripting languages.
  • Good verbal and written communication skills.

Responsibilities

  • Help create and maintain infrastructure for efficient debugging.
  • Support users of the emulation platform with various teams.
  • Conduct full chip debug using the Palladium emulator.
  • Assist with performance and power characterization.
  • Work closely with HW and SW teams to track bugs.

Skills

Debugging digital designs
Triage and diagnose test failures
Transition between HW and SW debug
Familiarity with IUS and/or VCS simulation

Education

BS or MS in EE or Computer Engineering
Bachelor's or Master’s degree in computer science or equivalent
At least 3 years of industry experience in verification or design
Proficient in RTL HDL (System Verilog)
Proficient in scripting languages (Python preferred)

Job description

Duties

General Description Vision: Assist the bring-up of GPU RTL model on an emulation platform. Support several emulation usage models and the engineering staff.


Responsibilities


  • Help create and maintain infrastructure to facilitate efficient debug of defects observed on emulation platform.

  • Support emulation platform users. Work directly with verification and regression teams, the RTL design team, and the software development team.

  • Support full chip debug using the Palladium emulator and other simulation environments.

  • Support using the emulation platform for performance and power characterization.

  • Work closely with hardware and software teams to find, debug and track bugs.


Skills / Experience Requirements


  • Debugging complex digital designs in a verification or design role, preferably on a GPU and/or multi-processor CPU design.

  • Ability to triage and diagnose test failures to efficiently root-cause design and/or SW bugs.

  • Ability to transition between HW and SW debug, as needed, while debugging issues.

  • Has used or is familiar with IUS and/or VCS simulation and debug, including Simvision and/or Verdi waveform debugging.


Education


  • BS or MS in EE or Computer Engineering.

  • Bachelor's or Master’s degree in computer science or equivalent.

  • At least 3 years of industry experience in verification or design.

  • Proficient in RTL HDL (preferably System Verilog).

  • Proficient in scripting languages (Python (preferred), Perl, TCL, shell and makefile environments).

  • Good verbal and written communication skills.

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