GenAI Accelerator Architect for Future SoCs

Google; Mountain View (CA); On-site; USD 167,000 - 278,000; Full time

Job summary

Google in Mountain View is seeking a hardware-focused GenAI architect to push the boundaries of custom silicon for next-gen Generative AI workloads. You will collaborate with research, system architecture, and compiler teams to define, explore, and optimize architecture for future GenAI use cases and workloads on TPU/SoCs.

The role emphasizes performance, power, and integration across hardware and software, with equal opportunity and a strong focus on cutting-edge AI hardware development.

Qualifications

• Bachelor’s degree in Computer Science, Electrical Engineering or related field, or equivalent practical experience.
• 10 years of work or academic research experience in computer or chip architecture, performance, or compiler.
• Experience with modern Generative AI model architectures (e.g., LLMs, ViT, diffusion models).
• Experience with one or more general purpose programming languages (e.g., C, C++, or Python) and deep learning frameworks (TensorFlow, JAX, or PyTorch).

Responsibilities

• Drive forward-looking GenAI ML architecture exploration for Tensor mobile SoCs in collaboration with research teams, system architecture teams, and compiler engineers.
• Define system architecture requirements for future Generative AI use cases with PM teams.
• Apply advanced research to achieve improvements in power and performance on GenAI workloads.
• Define optimal model scheduling on TPU compute engines to optimize GenAI performance.

Skills

Generative AI architectures

C/C++/Python

Deep learning frameworks

Education

Bachelor's degree in CS/EE or equivalent

Job description

Google in Mountain View is seeking a hardware-focused GenAI architect to push the boundaries of custom silicon for next-gen Generative AI workloads. You will collaborate with research, system architecture, and compiler teams to define, explore, and optimize architecture for future GenAI use cases and workloads on TPU/SoCs.

The role emphasizes performance, power, and integration across hardware and software, with equal opportunity and a strong focus on cutting-edge AI hardware development.