FPGA Verification Engineer – 100G Networking & UVM

Amazon Web Services (AWS); Jessup (MD); On-site; USD 136,000 - 184,000; Full time

Job summary

Amazon Development Center U.S., Inc. in Maryland seeks a Verification Engineer to verify high-speed digital logic with UVM/SystemVerilog testbenches and scalable verification strategies. You will develop testbenches for FPGA/ASIC designs and drive coverage, assertions and constrained-random stimuli.

This role sits at AWS hardware verification, with opportunities to work across RTL and IP integrations. You will collaborate with RTL designers to ensure functional and performance requirements are

Qualifications

• Bachelor's degree in Electrical or Communications Engineering or a related field.
• 3+ years of non-internship design or architecture (design patterns, reliability and scaling) experience.
• 4+ years of non-internship verification experience using SystemVerilog and/or UVM.
• 2+ years of experience verifying digital logic designs (FPGA or ASIC).
• Current, active US Government Security Clearance of Top Secret with SCI eligibility or above.

Responsibilities

• Develop UVM/SystemVerilog testbenches to verify custom RTL designs and third-party IP integrations for 100G+ solutions.
• Create and execute verification plans including functional coverage models, assertions, and constrained-random stimulus.
• Collaborate with design engineers to understand specifications and identify verification requirements and corner cases.
• Develop bus functional models, scoreboards, and checkers for complex interface protocols.
• Debug simulation failures, analyze waveforms, and drive issues to root cause resolution.
• Support FPGA-in-the-loop and hardware validation efforts by developing test sequences and diagnostic utilities.

Skills

SystemVerilog

UVM

Testbenches

Verification

FPGA

ASIC

Education

Bachelor's degree in Electrical or Communications Engineering or related field

Master's degree in Electrical or Communications Engineering or related field

Tools

Vivado

Synopsys VCS

Cadence Xcelium

Job description

Amazon Development Center U.S., Inc. in Maryland seeks a Verification Engineer to verify high-speed digital logic with UVM/SystemVerilog testbenches and scalable verification strategies. You will develop testbenches for FPGA/ASIC designs and drive coverage, assertions and constrained-random stimuli.

This role sits at AWS hardware verification, with opportunities to work across RTL and IP integrations. You will collaborate with RTL designers to ensure functional and performance requirements are