FPGA Implementation Engineer 5 (contract)

Boeing; El Segundo (CA); On-site; USD 145,000 - 158,000; Full time

Benefits offered by this job

Medical

Dental

Vision

401K

Job summary

Boeing is seeking a contract FPGA/ASIC design engineer in California. You will own top-level FPGA design, add blocks, and integrate IP cores, with emphasis on timing closure and constrained synthesis using Vivado for Versal/Ultrascale devices.

You will program FPGAs, collaborate with system engineering for HW/SW integration, and participate in testing to deliver a fully functioning system. On-site work in El Segundo is required.

Qualifications

• 5+ years of FPGA and/or ASIC design experience.
• Strong Xilinx/AMD Vivado experience.
• Experience with Versal family devices.
• Verilog/SystemVerilog HDL proficiency required.
• Advanced FPGA implementation skills (synthesis, timing closure, constraints).
• Active U.S. secret security clearance

Responsibilities

• Inherit FPGA top-level design and add new functional blocks and interfaces.
• Update constraint files, perform synthesis, simulation, and Place & Route to ensure timing closure and design integrity.
• Program FPGA devices, primarily from the Xilinx Versal, Ultrascale, and Ultrascale+ families.
• Collaborate with system engineering to support hardware/software integration and testing.
• On-site work is required.

Skills

FPGA/ASIC design

Vivado

Versal family

Verilog/SystemVerilog

Timing closure

Security clearance

Job description

This posting is for a contract assignment and is not a full-time employment offer with Boeing. Candidates selected for roles will be employed as contract workers through a Boeing approved 3rd party for the duration of the specified project.

Regular and predictable attendance is required

Work statement is a non-managerial role, non-leadership role.

The contractor will inherit FPGA top-level design and be responsible for creating and adding new functional blocks and interfaces, including integrating third-party and in-house IP cores. Responsibilities include updating constraint files, performing synthesis, simulation, and Place & Route processes to ensure timing closure and design integrity. The candidate will program FPGA devices, primarily from the Xilinx Versal, Ultrascale, and Ultrascale+ families.

Additionally, the contractor will collaborate closely with the system engineering team to support hardware and software system integration as well as testing activities to deliver a fully functioning system. Therefore, on-site work is required.

Required Skills

• 5+ years of FPGA and/or ASIC design experience;
• strong Xilinx/AMD Vivado experience;
• Experience with Versal family devices;
• Verilog/SystemVerilog HDL proficiency required;
• Advanced FPGA implementation skills (synthesis, timing closure, constraints);
• Active U.S. secret security clearance

Preferred Skills

• 2+ years of FPGA design experience;
• strong Xilinx/AMD Vivado experience;
• Verilog/SystemVerilog proficiency;
• Advanced FPGA implementation skills (synthesis, timing closure, constraints);

Ideal Candidates Will

• Demonstrate strong digital hardware fundamentals.
• Exercise sound engineering judgment.
• Work independently with minimal oversight.
• Communicate clearly and proactively.
• Produce high-quality technical documentation.
• Take ownership of their work and deliver maintainable engineering solutions.

Pay Rate Range

105 - 115 USD hourly

Benefits Information

• Optional Benefits: Medical, Dental, Vision, 401K

Tundra Technical Solutions is among North America’s leading providers of Staffing and Consulting Services. Our success and our clients’ success are built on a foundation of service excellence. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. Qualified applicants with arrest or conviction records will be considered for employment in accordance with applicable law, including the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act. Unincorporated LA County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: client provided property, including hardware (both of which may include data) entrusted to you from theft, loss or damage; return all portable client computer hardware in your possession (including the data contained therein) upon completion of the assignment, and; maintain the confidentiality of client proprietary, confidential, or non-public information. In addition, job duties require access to secure and protected client information technology systems and related data security obligations.