FPGA Engineer (RTL) Cryptographic IP

Darwin Recruitment; United States; Remote; USD 140,000 - 210,000; Full time

Job summary

Darwin Recruitment is seeking an RTL / FPGA Engineer specializing in cryptographic IP to translate architectural requirements into robust RTL and support FPGA or ASIC integrations.

The role emphasizes Verilog/SystemVerilog RTL, FPGA/ASIC design workflows, verification, timing analysis, and security-focused cryptographic work. This position suits engineers with a strong hardware verification and optimization background.

Qualifications

• RTL development using Verilog or SystemVerilog.
• FPGA or ASIC design workflows.
• Simulation, verification and hardware debugging.
• Synthesis, timing analysis and optimisation.
• Integration with buses, memory systems and software interfaces.
• Experience balancing throughput, latency and power.
• Cryptographic accelerators, secure boot, roots of trust and side-channel protection are particularly relevant.
• PQC hardware experience would be valuable, alongside transferable experience implementing established cryptographic algorithms.

Skills

RTL development with Verilog/SystemVer

Job description

RTL / FPGA Engineer, Cryptographic IP

We’re interested in engineers who can translate architectural requirements into robust RTL and support integration into FPGA or ASIC platforms.

Relevant experience

• RTL development using Verilog or SystemVerilog.
• FPGA or ASIC design workflows.
• Simulation, verification and hardware debugging.
• Synthesis, timing analysis and optimisation.
• Integration with buses, memory systems and software interfaces.
• Experience balancing throughput, latency, area and power.

Cryptographic accelerators, secure boot, roots of trust and side-channel protection are particularly relevant.

PQC hardware experience would be valuable, alongside transferable experience implementing established cryptographic algorithms.