FPGA Engineer II — Space Hardware & HDL Design

Airbus Ventures; Austin, Northern (TX, KY); Hybrid; USD 90,000 - 150,000; Full time

Benefits offered by this job

Stock options

Health insurance

Dental, Vision

HSA

FSA

Life insurance

Disability insurance

Retirement plans

Job summary

CesiumAstro is seeking an FPGA Engineer II to contribute to FPGA circuit and system development for satellites and aerospace platforms. You will work through all development phases, from design to verification, in a startup-like, collaborative environment.

The ideal candidate has 2+ years in FPGA design/verification (Verilog/VHDL) with exposure to HDL tools and lab instrumentation, and is able to thrive in a fast-paced space tech setting. Full-time, on-site at CesiumAstro facilities.

Qualifications

• BS/MS in Electrical Engineering or Computer Engineering from an accredited university.
• Minimum 2 years industry experience in the design, analysis, and implementation of FPGA systems at the HDL level.
• Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx's Vivado, Modelsim).
• Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
• Excellent written and verbal communication skills.

Responsibilities

• Contribute to the development of FPGA circuits and systems through all phases of the development process.
• Testing, validation, and verification will be central tasks for FPGA designs.
• Experience in digital signal processing or board-level hardware design is desirable.

Skills

Excellent written and verbal skills

Education

BS/MS in Electrical Engineering or Computer Engineering

Tools

Verilog

VHDL

HDL coder

Xilinx Vivado

Modelsim

Oscilloscopes

Spectrum analyzers

RF signal generators

Vector signal analyzers

Job description

CesiumAstro is seeking an FPGA Engineer II to contribute to FPGA circuit and system development for satellites and aerospace platforms. You will work through all development phases, from design to verification, in a startup-like, collaborative environment.

The ideal candidate has 2+ years in FPGA design/verification (Verilog/VHDL) with exposure to HDL tools and lab instrumentation, and is able to thrive in a fast-paced space tech setting. Full-time, on-site at CesiumAstro facilities.