FPGA Engineer

ProFound People Pty Ltd; Irvine (CA); On-site; USD 150,000 - 190,000; Full time

Job summary

ProFound People Pty Ltd in Irvine, California is seeking an FPGA Engineer to design real-time signal processing blocks and bring them from algorithm to verified hardware.

You will implement DSP functions in FPGA fabric (VHDL/Verilog/SystemVerilog), work with Xilinx/Intel/PolarFire devices, build testbenches, and collaborate with hardware and RF engineers; onsite, salary $150,000–$190,000, US work authorization required.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• 5–10 years hands-on FPGA design experience in commercial/defense environments.
• Strong VHDL/Verilog skills with timing constraints.
• Experience implementing DSP functions in FPGA fabric for communications/RF.
• Proven track record from specification to verification and lab validation.

Responsibilities

• Design FPGA signal processing datapaths from algorithm to implementation.
• Implement DSP functions such as up/down conversion, filtering, channelization, modulation/demodulation in VHDL/Verilog/SystemVerilog.
• Interface FPGAs with high-speed converters and embedded processors over AXI.
• Build testbenches and run simulations using Questa, ModelSim, or Vivado Simulator.
• Achieve timing closure and manage resources on high-speed designs.
• Bring up and debug new boards with hardware/RF engineers.
• Convert MATLAB algorithms to efficient FPGA implementations.
• Support system-level testing and document interfaces and test results.
• Contribute to design reviews and share FPGA best practices.

Skills

FPGA Design

DSP in FPGA

Verilog/VHDL/SystemVerilog

Timing Closure

Lab Verification

HW-SW Integration

Education

Bachelor's degree in Electrical Engineering

Tools

Vivado

Quartus

Questa

ModelSim

Vivado Simulator

Job description

An Orange County based communications technology company is hiring an FPGA Engineer to design the real time signal processing at the heart of its systems, and to carry those designs from algorithm all the way through to working hardware. Experience with FPGA based communications or RF systems is highly valued. Strong DSP implementation skills in FPGA fabric matter more than a specific product background, because the work is about turning high speed sampled data into something a system can use, reliably and on time.

In this role you will own FPGA blocks that sit between the RF data converters and the system processor. You will design and verify signal processing datapaths, including digital up and down conversion, filtering, channelization, and modulation and demodulation, on devices such as AMD (Xilinx) Zynq and RFSoC, Intel (Altera), or Microchip PolarFire. You will write synthesizable VHDL, Verilog, or SystemVerilog, build testbenches that prove each design before it reaches hardware, and work through timing closure on fast, dense designs. You will connect the FPGA fabric to high speed converter interfaces and embedded processors, and bring up new boards in the lab alongside hardware and RF engineers, using integrated logic analyzers, oscilloscopes, and spectrum analyzers to track down problems. You will also work with systems engineers to turn algorithm models, often from MATLAB, into efficient hardware, and document designs so they can be reviewed and maintained. This is a hands-on individual contributor role for someone who has taken FPGA designs from specification through to verified hardware before. It suits an engineer who is as comfortable reading a simulation waveform as reading a spectrum analyzer.

This is a full time position based in Irvine, California. Full time onsite role, so candidates should already live within commuting distance. The base salary range for this position is $150,000 to $190,000 per year, depending on experience. Applicants must be authorized to work in the United States on a full time basis without employer sponsorship, now or in the future. This position is not eligible for visa sponsorship.

Key Responsibilities:

• Design FPGA signal processing datapaths for communications and RF products, from algorithm through to implementation.
• Implement digital up and down conversion, filtering, channelization, and modulation and demodulation in VHDL, Verilog, or SystemVerilog.
• Interface FPGAs with high-speed data converters using JESD204B/C or LVDS, and with embedded processors over AXI.
• Build testbenches and run simulation to verify designs before hardware, using tools such as Questa, ModelSim, or Vivado Simulator.
• Achieve timing closure and manage resource use on high-speed, high-density designs.
• Bring up and debug new boards in the lab with hardware and RF engineers.
• Work with systems engineers to convert MATLAB algorithm models into efficient FPGA implementations.
• Support integration and system level testing of complete products.
• Produce design documentation, interface definitions, and test results for review and long-term maintenance.
• Contribute to design reviews and share FPGA best practice across the engineering team.

Requirements:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• 5 to 10 years of hands-on FPGA design experience in a commercial or defense product environment.
• Strong VHDL or Verilog skills, with a solid understanding of synchronous design, clock domain crossing, and timing constraints.
• Experience implementing DSP functions in FPGA fabric, ideally for communications or RF systems.
• Proven track record taking FPGA designs from specification through simulation, implementation, and lab verification.
• Hands-on experience with AMD (Xilinx) Vivado or Intel (Altera) Quartus toolchains.
• Confidence debugging at the bench with integrated logic analyzers, oscilloscopes, and RF test equipment.
• Strong written and verbal communication skills, with the ability to work closely with hardware, RF, and software engineers.

Nice to Have:

• Experience with RFSoC, JESD204B/C, or other high speed data converter interfaces.
• Knowledge of OFDM, spread spectrum, or software defined radio architectures.
• SystemVerilog and UVM, or Python based verification with cocotb.
• MATLAB or Simulink, including HDL Coder.