FPGA & Embedded Firmware Architect — Lead Engineer

Eaton; Youngsville (NC); On-site; USD 105,000 - 154,000; Full time

Job summary

Eaton in Youngsville, NC seeks a Lead Embedded Firmware & FPGA Engineer to architect, develop, verify, and release FPGA‑based designs for next‑gen power management products. You will collaborate with global cross‑functional teams to bring SiC‑based three‑phase power conversion systems to market for mission critical loads such as data centers.

Responsibilities include RTL coding in Verilog/SystemVerilog/VHDL, testbench development, timing analysis, and integration of interfaces (SPI, I2C, UART,

Qualifications

• Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or related field.
• Experience with synthesizable RTL coding in VHDL/Verilog/SystemVerilog.
• Experience with FPGA design workflows: RTL, simulation, synthesis, timing, hardware validation.
• PhD or advanced degrees with lab work are considered as indicated in the ad.

Responsibilities

• Architect, develop, verify, test, and release FPGA‑based designs for new product development.
• Translate system requirements into FPGA architecture and detailed design specs.
• Develop testbenches and perform RTL simulation and functional verification.
• Collaborate with cross‑functional teams to support SiC‑based power conversion systems.

Skills

Digital logic design

Finite-state machines

FPGA timing

Verilog/SystemVerilog

VHDL

Clocking & reset architectures

Resource optimization

Education

Bachelor’s degree in Electrical Engineering

Master’s degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Intel Quartus

ModelSim/Questa

Job description

Eaton in Youngsville, NC seeks a Lead Embedded Firmware & FPGA Engineer to architect, develop, verify, and release FPGA‑based designs for next‑gen power management products. You will collaborate with global cross‑functional teams to bring SiC‑based three‑phase power conversion systems to market for mission critical loads such as data centers.

Responsibilities include RTL coding in Verilog/SystemVerilog/VHDL, testbench development, timing analysis, and integration of interfaces (SPI, I2C, UART,