FPGA Design Engineer II — Ultra-Low Latency Trading

HPR; Needham (MA); On-site; USD 129,000 - 166,000; Full time

Job summary

HPR, located in Needham, MA, is seeking an FPGA Design Engineer to develop high-performance FPGA systems for electronic trading. The ideal candidate will hold a BS/MS in relevant fields and possess 3+ years of experience in digital logic design, preferably with SystemVerilog. This is a full-time on-site role, offering a salary range of $129,000 to $166,000 based on experience and qualifications.

Responsibilities include leading the RTL design process and mentoring junior engineers. HPR promotes a culture of continuous learning and collaboration.

Qualifications

• 3+ years of experience in digital logic design for FPGAs or ASICs.
• Deep understanding of computer architecture and digital design concepts.
• Experience with simulation and debugging tools.

Responsibilities

• Design, develop, and maintain FPGA compute and network systems.
• Lead the RTL design process from specification to FPGA implementation.
• Mentor junior engineers and improve development processes.

Skills

Digital logic design for FPGAs or ASICs

SystemVerilog

Computer architecture

Problem solving

Debugging skills

Education

BS/MS in Computer Engineering, Electrical Engineering, or Computer Science

Tools

VCS

Verdi

Linux environment

Job description

HPR, located in Needham, MA, is seeking an FPGA Design Engineer to develop high-performance FPGA systems for electronic trading. The ideal candidate will hold a BS/MS in relevant fields and possess 3+ years of experience in digital logic design, preferably with SystemVerilog. This is a full-time on-site role, offering a salary range of $129,000 to $166,000 based on experience and qualifications.

Responsibilities include leading the RTL design process and mentoring junior engineers. HPR promotes a culture of continuous learning and collaboration.