A proprietary trading firm in Chicago is seeking a Senior FPGA Engineer to enhance ultra-low-latency trading systems. Candidates should have proven FPGA development experience and advanced skills in HDLs, preferably SystemVerilog or VHDL. The role includes collaborating with teams to improve trading workflows and performance. This position offers a competitive salary ranging from $225,000 to $250,000, alongside a hybrid work model and excellent employee benefits.
Qualifications
Proven experience and expertise with FPGA development.
Advanced proficiency using HDLs, with an emphasis on SystemVerilog or VHDL.
Comfortable working in Python and/or C++ for developing tools, testbenches, and integrations.
Demonstrated understanding of computer architectures.
Enthusiasm for applying modern, agile design and testing practices.
Responsibilities
Define and implement an architectural vision focused on ultra-low-latency and reliability.
Improve our trading platform design in collaboration with senior technology leaders.
Understand trading workflows and system performance needs with a multidisciplinary team.
Develop a roadmap to incrementally improve trading performance and ensure architectural innovation.
Lead design implementation and contribute to team code reviews for performance and maintainability.
Skills
FPGA development
SystemVerilog
VHDL
Python
C++
Job description
A proprietary trading firm in Chicago is seeking a Senior FPGA Engineer to enhance ultra-low-latency trading systems. Candidates should have proven FPGA development experience and advanced skills in HDLs, preferably SystemVerilog or VHDL. The role includes collaborating with teams to improve trading workflows and performance. This position offers a competitive salary ranging from $225,000 to $250,000, alongside a hybrid work model and excellent employee benefits.