FPGA Design Engineer II — Onsite, Production-Ready RTL

RTX; San Jose (CA); On-site; USD 69,000 - 131,000; Full time

Benefits offered by this job

Relocation Assistance

9/80 Schedule

Job summary

RTX is seeking an FPGA Design Engineer II in Tucson, AZ to develop FPGA designs for Xilinx, Altera, and Microsemi using VHDL. You will collaborate with circuit card designers and systems engineers from requirements through integration and test.

The role includes verification with directed tests and constrained random methods, thorough documentation, and mentoring of junior engineers. A DoD Secret clearance and U.S. citizenship are required.

Qualifications

• Degree in Science, Technology, Engineering or Mathematics (STEM) with at least 2 years of relevant experience.
• Experience with VHDL and/or Verilog coding.
• Experience with Xilinx or Microsemi devices and flow tools.

Responsibilities

• Design and deliver production quality FPGA releases from initial proof of concept up to production.
• Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS).
• Translate system level requirements into FPGA requirements.
• Design and code in VHDL for reliability and maintainability.
• Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage.
• Help drive projects and execute to program schedules on time and budget.
• Create complete documentation including requirements, verification plan, and user's guides.
• May lead small teams and mentor junior engineers.
• May support internal and external technical reviews.

Skills

VHDL/Verilog coding

Xilinx/Microsemi tooling

Education

STEM degree

Tools

Xilinx devices & tools

Microsemi devices & tools

Job description

RTX is seeking an FPGA Design Engineer II in Tucson, AZ to develop FPGA designs for Xilinx, Altera, and Microsemi using VHDL. You will collaborate with circuit card designers and systems engineers from requirements through integration and test.

The role includes verification with directed tests and constrained random methods, thorough documentation, and mentoring of junior engineers. A DoD Secret clearance and U.S. citizenship are required.