Senior FPGA Verification Engineer - RTL & SystemVerilog

Anduril-1; Waltham (MA); On-site; USD 166,000 - 220,000; Full time

Job summary

Anduril Industries is seeking an FPGA Verification Engineer to help design and mature new product lines. You will work with a cross-functional team to define, verify, prototype, and test RTL blocks, leading to ground and flight testing readiness.

Responsibilities include building verification environments, test plans, and testbenches in VHDL/SystemVerilog, while driving continuous improvements to our ASIC/FPGA verification flow. A U.S. Secret clearance is required or eligible.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related technical field is required.
• 8+ years of experience developing HDL firmware for FPGA devices.
• Experience simulating RTL designs using VHDL and/or Verilog in FPGA/ASIC environments.
• Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog.
• Experience applying chip-level verification methodologies including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog).
• Experience using Git or Subversion for source control and collaboration.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Responsibilities

• Verify FPGA/ASIC RTL using VHDL/SystemVerilog.
• Develop verification environment architecture and test plans.
• Create testbenches and track code coverage and functional coverage.
• Suggest improvements to verification flow and tooling.
• Contribute to project verification estimates and schedules.
• Provide technical leadership to verification teams.

Skills

HDL firmware development

VHDL/Verilog RTL

RTL testbenches

Constrained-random testing

Git/Subversion

Security clearance eligibility

Unix/Linux

Scripting languages

Education

Bachelor's in Electrical/Computer Engineering

Tools

QuestaSim

Synplify

Quartus

Vivado

Job description

Anduril Industries is seeking an FPGA Verification Engineer to help design and mature new product lines. You will work with a cross-functional team to define, verify, prototype, and test RTL blocks, leading to ground and flight testing readiness.

Responsibilities include building verification environments, test plans, and testbenches in VHDL/SystemVerilog, while driving continuous improvements to our ASIC/FPGA verification flow. A U.S. Secret clearance is required or eligible.