FE Engineering

Apple Inc.; Austin (TX); Híbrido; USD 120 000 - 170 000; Tempo integral

Resumo da oferta

Apple Inc. in Austin, Texas, is seeking an experienced hardware engineer to optimize and implement chip designs for cutting-edge devices. The role focuses on synthesis, timing constraints, power integrity, and signoff, ensuring robust physical design across FPGA/ASIC-like workflows.

You will collaborate with CAD teams to resolve issues, apply ECOs, and push for low power, small area, and high-performance results while maintaining RTL validity and verification using industry-standard tools.

Qualificações

• Master’s degree in Electrical & Computer Engineering or related field with 2 years of experience.
• Experience using VLSI design and timing to evaluate engineering tradeoffs.
• Proficiency with HDL to understand and improve designs.
• Scripting in Perl and Python to automate tasks.
• Apply physical design concepts to improve timing and reduce congestion.
• Experience with synthesis techniques and Boolean optimization to recover area and power, and fix setup/hold timing violations.
• RTL and Netlist validation using simulation and debugging tools.
• Understanding GPU architectures to guide dataflow and optimization.

Responsabilidades

• Optimize and implement chip designs for hardware devices.
• Design synthesis to convert RTL to digital logic gates.
• Perform static timing analysis and constraint development.
• Work on power integrity checks and signoff flows for chip designs.
• Collaborate with CAD team and tool vendors to resolve flow or integration issues.
• Create innovative flows to support new chip designs.
• Optimize logic for low power, low area, high performance, and timing goals.

Conhecimentos

VLSI design

HDL

Perl scripting

Python scripting

Synthesis techniques

Boolean optimization

RTL/Netlist validation

GPU architectures

Timing optimization

Physical design concepts

Formação académica

Master's in Electrical & Computer Engineering

Descrição da oferta de emprego

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Optimizing and Implementing designs for chips in hardware devices. Designing synthesis to convert functional Register Transfer Level code to digital logic gates in physical chip design. Performing Static timing analysis and constraint development to ensure that the physical design meets timing requirements. Working on Power integrity checks to ensure that the various power domains and their interfaces are complete. Working on Signoff checks to develop and maintain flows that help verify the overall quality of the chip designs. Engineering Change Order implementations to meet the overall functionality and timing closure of the design. Working with the CAD team and tool vendors to identify and quickly resolve any flow or integration issues. Creating innovative flows and processes to support new chip designs. Performing Lint checks, to ensure the overall quality of Register Transfer Level code meets the guidelines. Optimizing logic designs to achieve low power, low area, high performance and timing goals. 40 hours/week.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical & Computer Engineering or related field and 2 years of experience in the job offered or related occupation.
• Experience and/or education must include:
• Using VLSI design and timing to evaluate engineering tradeoffs.
• Using knowledge of HDL to understand the functionality of the designs and suggest improvements.
• Scripting in Perl and Python to automate tasks.
• Using physical design concepts to improve timing, reduce congestion and to implement engineering change of orders (ECOs).
• Using synthesis techniques and Boolean optimization to recover area, power and to fix setup and hold timing violations.
• Using simulation and debugging tools for RTL and Netlist validation.
• Using GPU architectures to understand dataflow and steer synthesis and optimizations techniques.

Preferred Qualifications

• N/A

This position is not subject to the application limits.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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Apple accepts applications to this posting on an ongoing basis.