Engineer II-Design

Microchip Technology Inc.

Allentown (Lehigh County)

On-site

USD 110,000 - 150,000

Full time

10 days ago

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Microchip Technology Inc. is seeking an RTL design engineer to design, simulate and verify RTL blocks for an SOC with diverse IP. You will work on imaging, networking, compute and data storage interfaces.

You will participate in RTL implementation, timing verification and test-chip porting, with FPGA experience a plus. A strong background in SystemVerilog, scripting, and Linux is required.

Qualifications

  • 2–5 years of experience in RTL design for ASIC implementation.
  • Bachelor’s degree in Electrical/Computer Engineering or Computer Science.
  • Experience with RTL design tools including entry, synthesis, formal verification, RTL/gate level simulation.
  • Proficiency in SystemVerilog; experience with Verilog simulation tools.
  • Ability to design complex state machines and datapath logic.
  • Proficiency in TCL/Perl/Python and Linux; knowledge of industry standards.
  • Strong written and verbal communication; self-motivated team player.

Responsibilities

  • General RTL and ASIC development.
  • Detailed module design, performance analysis and design specification creation.
  • Participate in RTL implementation, synthesis, simulation, pre-layout/post-layout timing verification.
  • Understand high-speed design techniques to improve bandwidth and reduce latency.
  • Support porting the design into test chips and emulation platforms; FPGA experience is advantageous.

Skills

RTL design
SystemVerilog
Scripting: TCL/Perl/Python
Linux
State machines & datapath
Communication skills

Education

Bachelor's in Electrical Engineering / Computer Engineering / Computer Science
Master's preferred

Tools

Design entry tools
Synthesis tools
Formal verification tools
Verilog/SystemVerilog simulators
Static timing analysis tools

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await!

Job Description: Summary

As a member of Microchip’s engineering community, your primary responsibility will be to design, simulate, and verify various RTL-based blocks on our devices. Microchip’s designs are an SOC with various hard and soft IP blocks that support many industry standard protocols for Imaging, Networking System Connectivity, Compute and Data Storage.

Duties & Responsibilities
  • General RTL and ASIC development
  • Detailed module design, performance analysis and detailed design specification creation.
  • Participate in the RTL implementation, synthesis, simulation, pre-layout/post-layout timing verification.
  • Understanding of emerging high-speed design techniques to improve Data & Command processing bandwidth, reduce latencies & increase reliability.
  • Support porting the design into test chips and emulation platforms – experience with FPGA design and board implementation tools is advantageous.
Requirements/Qualifications
  • 2-5 years of experience in RTL Design for ASIC implementation.
  • Bachelor’s in Electrical Engineering, Computer Engineering or Computer Science.
  • Design courses and practical application of course learning for high-speed RTL design.
  • Experience with RTL Design tools that include design entry, synthesis, formal verification, RTL/gate level simulation, cross-domain clocking analysis and static timing analysis.
  • Course and Practical usage in RTL design, design verification, synthesis & formality.
  • Proficiency in SystemVerilog development languages.
  • Course and Practical usage in Static Timing Analysis and Verilog simulation tools.
  • Should be able to design complex state machines & data path logic.
  • Proficiency in scripting languages (TCL / Perl / Python) and LINUX.
  • Ability to understand and implement industry standards.
  • Ability to write detailed design specifications.
  • Good analytical, oral and written communication skills.
  • Able to write clean, readable presentations.
  • Self-motivated, proactive team player.
  • Ability to work to schedule requirements.
  • Preferred Master’s in Electrical Engineering, Computer Engineering or Computer Science.
  • FPGA and ASIC System On Chip Design Experience.
  • Lab Experience for system-level validation.
U.S. Export Controls Requirements

This job requires access to technology, materials, software or hardware that is controlled by the export laws of the United States. Candidates are required to provide proof of either US citizenship, Permanent US residency or classification as a protected individual as defined in 8 USC 1324b (a) (3).

Travel Time & Physical Attributes

Travel Time: 0% - 25% Physical Attributes: Hearing, Other, Seeing, Talking, Works Alone, Works Around Others Physical Requirements: 100% inside, 80% sitting, 10% standing, 10% walking

Equal Employment Opportunity Statement

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Engineer II - Design
Engineer II - Design

Microchip Technology Inc. • Hauppauge (NY)

On-site
USD 70,000 - 143,000
Engineer II - Digital ASIC Design
Engineer II - Digital ASIC Design

Microchip Technology Inc • San Jose (CA)

On-site
USD 70,000 - 143,000
Health benefits from day one
Retirement savings plan
ESPP with 2-year lookback
Principal Engineer-Design (SoC Integration and RTL/IP)
Principal Engineer-Design (SoC Integration and RTL/IP)

Microchip Technology Inc. • Chandler (AZ)

On-site
USD 130,000 - 190,000
Technical Staff Engineer - Applications
Technical Staff Engineer - Applications

Microchip Technology Inc. • Hauppauge (NY)

On-site
USD 91,000 - 232,000
Health benefits day one
ESPP program
Retirement plan
Principal Engineer - Digital Design
Principal Engineer - Digital Design

Microchip Technology Inc. • Colorado Springs (CO)

On-site
USD 75,000 - 232,000
Health benefits from day one
Retirement savings plans
ESPP program with 2-year look back
Senior Engineer I - Product
Senior Engineer I - Product

Microchip Technology Inc. • San Jose (CA)

On-site
USD 70,000 - 205,000
Technical Staff Engineer - Design
Technical Staff Engineer - Design

Microchip Technology Inc • Chandler (AZ)

On-site
USD 91,000 - 232,000
Competitive base pay
Restricted stock units
Quarterly bonus payments
+3
Principal Engineer-Design
Principal Engineer-Design

Microchip Technology Inc. • Chandler (AZ)

On-site
USD 75,000 - 232,000
Health benefits from day one
ESPP with 2-year look-back
Retirement savings plan
Senior Engineer II - Product
Senior Engineer II - Product

Microchip Technology Inc. • San Jose (CA)

On-site
USD 70,000 - 163,000
Health benefits beginning day one
RSU equity program
Annual bonus opportunities
+1
Senior Engineer I- Product
Senior Engineer I- Product

Microchip Technology Inc. • Norristown

On-site
USD 110,000 - 150,000