Emulation Engineer

CloudIngest; Sunnyvale (CA); On-site; USD 130,000 - 190,000; Full time

Job summary

CloudIngest is seeking an Emulation Engineer to support pre-silicon verification and validation of complex SoCs. You will work hands-on with hardware emulation platforms and contribute to debug, bring-up, and optimization efforts in a collaborative team.

The role requires experience with Verilog/SystemVerilog, Linux, and scripting (Python/Tcl/sh), plus strong analytical and communication skills. This position is based in Sunnyvale, CA and involves close collaboration with RTL, firmware, and

Qualifications

• Bachelor's or Master's degree in Electrical or Computer Engineering.
• Hands-on experience with hardware emulation platforms (ZeBu, Palladium, Veloce).
• Strong Verilog/SystemVerilog and RTL design knowledge.
• Experience with SoC verification, emulation bring-up, and debugging.
• Familiarity with AXI or APB interfaces.
• Proficiency in Python, Tcl, or shell scripting.
• Experience in Linux environments.
• Strong analytical and communication skills.

Responsibilities

• Develop, bring up, and maintain emulation environments for SoC verification/validation.
• Prepare RTL, testbenches, clocks, resets, and memory models for emulation.
• Perform design compilation, partitioning, mapping, and debugging on emulation platforms.
• Develop and execute tests for functional validation and HW/SW integration.
• Debug failures using waveforms, logs, traces, and platform tools.
• Optimize emulation performance, compile time, and resource usage.
• Collaborate with RTL, verification, firmware, and software teams to resolve issues.
• Automate build, execution, regression, and reporting with scripting languages.
• Document emulation setup, test results, and debug procedures.

Skills

Verilog / SystemVerilog

RTL design

SoC verification

Emulation bring-up

Debugging

Python

Tcl

Shell scripting

Linux

Communication skills

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering

Tools

Synopsys ZeBu

Cadence Palladium

Siemens Veloce

Job description

We are seeking an Emulation Engineer to support pre-silicon verification and validation of complex SoC designs. The ideal candidate will have hands-on experience with hardware emulation, strong debugging skills, and experience bringing up and optimizing emulation environments. Experience with Synopsys ZeBu is preferred.

Responsibilities

• Develop, bring up, and maintain hardware emulation environments for SoC verification and validation.
• Prepare RTL, testbenches, clocks, resets, and memory models for emulation.
• Perform design compilation, partitioning, mapping, and debugging on emulation platforms.
• Develop and execute tests for functional validation and hardware/software integration.
• Debug failures using waveforms, logs, traces, and platform debugging tools.
• Optimize emulation performance, compile time, and resource utilization.
• Collaborate with RTL design, verification, firmware, and software teams to resolve issues.
• Automate build, execution, regression, and reporting workflows using scripting languages.
• Document emulation setup, test results, and debug procedures.

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Hands-on experience with hardware emulation platforms such as Synopsys ZeBu, Cadence Palladium, or Siemens Veloce.
• Strong knowledge of Verilog/SystemVerilog, RTL design concepts, and digital logic.
• Experience with SoC verification, emulation bring-up, and debugging.
• Familiarity with clock and reset architectures, memory subsystems, and common interfaces such as AXI or APB.
• Proficiency in Python, Tcl, or shell scripting.
• Experience working in Linux environments.
• Strong analytical, problem-solving, and communication skills.

Preferred Qualifications

• Hands-on experience with Synopsys ZeBu, including compilation, bring-up, debugging, and performance optimization.
• Experience with transactors, synthesizable testbenches, and emulation-friendly verification environments.
• Familiarity with UVM and simulation-to-emulation migration.
• Experience with embedded firmware, C/C++, and pre-silicon software validation.
• Exposure to complex SoCs with CPU, GPU, PCIe, DDR, or other high-speed subsystems.