Emulation Engineer

Arteris; San Jose (CA); On-site; USD 150,000 - 190,000; Full time

Job summary

Arteris is seeking an Emulation Engineer in the San Jose area to design and deliver interconnect and memory hierarchy solutions for mobile, telecom, automotive, and consumer SoC designs. You will work with RTL and software to provide configurable, testable, high-quality emulation outcomes and influence development environments and verification processes.

Ideal candidates have 3+ years on SoC/IP integration, strong Verilog/SystemVerilog skills, and hands-on experience with emulation platforms

Qualifications

• 3+ years’ experience on SoC, system on chip, IPs integration or IP RTL design; familiarity with Verilog & SystemVerilog.
• Strong emulation experience on platforms such as Palladium, Veloce, or Zebu; including compilation, debug, performance, and throughput optimization.
• Knowledge of ARM CHI-E/ACE/AXI bus protocols.
• Experience of Emulator for 'SoC + Software' validation; Siemens Veloce experience is a plus.
• Strong skill on signal waveform debugging using visualization tools.

Responsibilities

• Maintain hardware emulation system in full operational condition.
• Define, document, develop and execute emulation processes for multiple projects.
• Integrate hardware emulation system with different software platforms.
• Triaging regressions and debugging RTL designs in Verilog and SystemVerilog.
• Improve and refine emulation processes, methodologies, and metrics.

Skills

Verilog

SystemVerilog

Emulation

SoC/IP integration

Debug signal waveforms

Education

MS degree in EE/CS

BS degree minimum

Tools

Palladium

Veloce

Zebu

Job description

Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.

If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!

As a Emulation Engineer at Arteris, you will work with an expert team to design and deliver interconnect & memory hierarchy solutions for some of the world's most sophisticated mobile, telecom, automotive, and consumer SoC designs. You will create designs in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions. You will go home at the end of the day amazed at all the places where your creations end up. You will have the opportunity to be part of a proven-successful startup, and to influence development environment, architecture, verification, and everything in-between - you will no longer be stuck in a silo or just a cog in the machine. Your co-workers will be an experienced team of industry experts that love what they do.

Key Responsibilities:

• Maintaining hardware emulation system in full operational condition
• Defining, documenting, developing and executing emulation process for multiple projects
• Integrating hardware emulation system to different software platform
• Triaging Regressions, Debugging RTL designs in Verilog and SystemVerilog
• Help improve and refine emulation process, methodology, and metrics

Experience Requirements / Qualifications:

• 3+ years’ experience on SoC, system on chip, IPs integration or IP RTL design. Familiar with Verilog & SystemVerilog programming.
• Strong emulation experience working on available platforms such as; Palladium, Veloce, or Zebu, as well as experience with compilation, debug, performance, and throughput optimization
• Knowledge of ARM CHI-E/ACE/AXI bus protocol.
• Experience of Emulator for "SoC + Software" validation. Siemens Veloce experience is a plus.
• Strong skill on signal waveform debugging, such as Visualization tools.

Education Requirements:

• MS degree in EE, CS, or equivalent preferred. BS degree minimum.

$150,000 - $190,000 Annually

About Arteris:

Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.

With over 300 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more at arteris.com.