Emulation Engineer

Etched; San Jose (CA); On-site; USD 150,000 - 275,000; Full time

Benefits offered by this job

Medical, dental, and vision packages

$500 monthly credit for waiving medical benefits

Housing subsidy of $2k per month

Relocation support

Daily lunch and dinner

Job summary

Etched is seeking a skilled engineer to oversee SoC bring-up on emulation platforms in San Jose. The role involves developing automated build flows and collaborating with cross-functional teams to enhance emulation capabilities.

Ideal candidates will have hands-on experience with various emulation platforms, strong C/C++ skills, and the ability to troubleshoot complex issues. Benefits include substantial medical coverage and relocation support for candidates moving to the Santana Row area.

Qualifications

• Hands-on experience with emulation platforms like Palladium, Protium, or Veloce.
• Strong skills in C/C++ and Linux system development.
• Experience in CI/CD tooling for hardware validations.

Responsibilities

• Oversee SoC bring-up on emulation platforms.
• Develop automated build and regression flows.
• Collaborate with various technical teams to enhance platform capabilities.

Skills

Emulation platform experience

C/C++ programming skills

Linux system development

SystemVerilog and Verilog proficiency

Git-based development workflows

Python scripting for automation

Job description

Key Responsibilities

• Oversee SoC bring‑up on emulation platforms; diagnose and resolve failing SoC/processor tests.
• Develop and maintain automated build and regression flows to accelerate pre‑silicon validation and software development.
• Provide support across emulation environments using advanced techniques including C/C++ DPI transactors, coverage analysis, and in‑circuit emulation for high‑speed protocols.
• Collaborate closely with Design, DV, Silicon Validation, Performance, and Software teams, and partner with leading emulation vendors to enhance platform capabilities and resolve complex issues.
• Develop high‑performance infrastructure to capture debugging signals and surface actionable insights for users.
• Implement hybrid emulation environments using custom DPI‑based streaming transactors.
• Create highly configurable chip‑to‑chip network models using emulation‑efficient primitives.
• Build and maintain CI pipelines and git‑based workflows for emulation build reproducibility and regression tracking.

You may be a good fit if you have

• Hands‑on experience with emulation platforms such as Palladium, Protium, Veloce, ZeBu, or HAPS, covering design bring‑up, build flows, debugging, and performance tuning.
• Strong C/C++ and Linux system development skills. Proficiency with SystemVerilog and Verilog, including DPI‑based interfaces.
• Experience with git‑based development workflows and scripting (Python) for automation and flow development.

Strong candidates may also have experience with

• UVM verification environments.
• Background in design verification, DFT, and testbench modeling.
• Familiarity with waveform debug tools such as Verdi or SimVision.
• Experience with SLURM or similar job schedulers for managing large emulation workloads.
• Familiarity with CI/CD tooling (e.g., Jenkins, GitHub Actions) applied to hardware or pre‑silicon validation flows.

Benefits

• Medical, dental, and vision packages with generous premium coverage.
• $500 per month credit for waiving medical benefits.
• Housing subsidy of $2k per month for those living within walking distance of the office.
• Relocation support for those moving to San Jose (Santana Row).
• Various wellness benefits covering fitness, mental health, and more.
• Daily lunch and dinner in our office.
• Unlimited compute budget subject to ROI justification.

Compensation Range

• $150,000 - $275,000