Emulation Engineer / Emulation Platform Engineer

Qualcomm; Austin (TX); On-site; USD 154,000 - 231,000; Full time

Benefits offered by this job

Competitive annual discretionary bonus program

Opportunity for annual RSU grants

Comprehensive benefits package

Job summary

Qualcomm is looking for an experienced Emulation Engineer to manage, build, and launch verification jobs on hardware emulation platforms. You will collaborate closely with design and verification teams to accelerate pre-silicon validation and ensure high-quality RTL delivery.

The ideal candidate should have a Bachelor's degree and relevant experience in software or electrical engineering, with a strong proficiency in SystemVerilog and automation scripting.

Qualifications

• 4+ years of relevant experience for Bachelor's or 3+ years for Master's.
• 2+ years with high-performance microprocessor design.

Responsibilities

• Set up and maintain emulation platforms for design bring-up.
• Compile and partition RTL designs for emulation.
• Develop and maintain automation for emulation runs.
• Collaborate with DV engineers to port testbenches.
• Debug emulation targets using Angel debug monitor.
• Manage job scheduling across shared hardware.
• Report emulation run results and triage failures.

Skills

Proficiency in SystemVerilog (RTL and/or testbench)

Strong Git usage

Experience with emulation platforms (Veloce, Palladium, ZeBu)

Scripting skills: Python, Tcl, Shell

Understanding of emulation compilation flows

Familiarity with UVM-based verification environments

Education

Bachelor's degree in Electrical Engineering, Computer Science, or related field

Master's degree in relevant field

PhD in relevant field

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > DSP Architecture and Design

General Summary

Looking for an experienced Emulation Engineer to manage, build, and launch verification jobs on hardware emulation platforms (e.g., Veloce, Palladium, ZeBu). You will work closely with design and verification teams to accelerate pre-silicon validation and ensure high-quality RTL delivery.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 4+ years of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
• Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 3+ years of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
• PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field and 2+ years of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
• 2+ years of experience with high-performance microprocessor design.

Responsibilities

• Set up, configure, and maintain emulation platforms (e.g., Veloce) for design bring-up and regression runs.
• Compile and partition RTL designs for emulation, resolving synthesis and mapping issues.
• Develop and maintain job scripts, infrastructure, and automation for launching and monitoring emulation runs.
• Collaborate with DV engineers to port testbenches and verification environments to the emulation platform.
• Debug emulation targets using Angel debug monitor, including semihosting for I/O and diagnostics during early bring-up.
• Manage job scheduling and resource allocation across shared emulation hardware.
• Track and report emulation run results; triage failures and elevate blockers.
• Maintain version-controlled flows and scripts using Git.

Required Skills

• Proficiency in SystemVerilog (RTL and/or testbench).
• Strong Git usage: branching, merging, managing flows across teams.
• Hands‑on experience with at least one emulation platform (Veloce, Palladium, ZeBu, or similar).
• Angel debug monitor – experience with the ARM Angel semihosting protocol for early‑stage target bring‑up, host‑target communication, and low‑level diagnostics.
• Understanding of emulation compilation flows (partitioning, clock domain handling, memory modeling).
• Scripting skills: Python, Tcl, or Shell for job automation and flow management.
• Familiarity with UVM‑based verification environments.

Nice to Have

• Experience with SystemVerilog DPI or transactor‑based emulation interfaces.
• Background in FPGA synthesis or logic equivalence checking.
• Knowledge of CDC (clock domain crossing) analysis and constraints.
• Experience with LSF, Slurm, or similar job schedulers.
• Familiarity with embedded operating systems (e.g., Zephyr, FreeRTOS, embedded Linux) and their bring‑up on emulated or FPGA‑based platforms.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Pay range and Other Compensation & Benefits

$154,000.00 - $231,000.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.