EM/SEB CAD Engineer — Thermal & Flow Innovator

Apple, Inc.; Sunnyvale (CA); On-site; USD 129,000 - 195,000; Full time

Benefits offered by this job

Stock options

Education reimbursement

Relocation assistance

Medical coverage

Job summary

Apple Inc. in Sunnyvale, CA seeks a highly motivated engineer to contribute to EM/SEB/thermal analysis methodologies for gate- and transistor-level designs. You will help automate CAD flows, run simulations, and support verification tasks across clock trees and high-speed data paths.

Ideal candidates hold a BS/MS in EE, with strong VLSI foundations and scripting skills. Collaboration with Physical Design, Timing, and Power teams is essential; a growth mindset and curiosity about AI/ML in CAD/EDA

Qualifications

• BS or MS in Electrical Engineering or related field.
• Strong foundation in VLSI design and semiconductor physics.
• Experience with STA, SPICE, and parasitic extraction.
• Proficiency in Tcl, Python, or Perl.
• Internship or project experience in VLSI CAD/EDA flows.

Responsibilities

• Assist in developing EM/SEB/thermal analysis methodologies and flows.
• Support automation, maintenance, and regression testing of CAD flows from setup through sign-off.
• Help run, validate, and debug simulation and verification runs on benchmark and production designs.
• Assist in developing and maintaining verification scripts and rule checks for clock trees, high-speed data paths, and critical signal nets.
• Partner with senior team members to support cross-functional teams by triaging flow execution issues and gathering data.

Skills

VLSI design

Semiconductor physics

Circuit theory

Computer engineering

Tcl scripting

Python scripting

CAD methodologies

Team collaboration

Education

Electrical Engineering BS/MS

Tools

Voltus

RedHawk

Primetime

ICC2

Innovus

SPICE

Job description

Apple Inc. in Sunnyvale, CA seeks a highly motivated engineer to contribute to EM/SEB/thermal analysis methodologies for gate- and transistor-level designs. You will help automate CAD flows, run simulations, and support verification tasks across clock trees and high-speed data paths.

Ideal candidates hold a BS/MS in EE, with strong VLSI foundations and scripting skills. Collaboration with Physical Design, Timing, and Power teams is essential; a growth mindset and curiosity about AI/ML in CAD/EDA