CAD Engineer - EMIR Signoff

Apple Inc.; Austin (TX); On-site; USD 160,000 - 230,000; Full time

Job summary

Apple Inc. in Austin, TX seeks a Senior Signoff Engineer to define and execute signoff across gate and transistor levels for next‑generation mixed-signal SoCs. You will collaborate with Design, CAD, and Technology teams to ensure robust power/EMIR verification and drive AI/ML enhancements to signoff flows.

The role emphasizes hands-on analysis, scripting proficiency in Python/Perl, and strong communication to enable rapid debug and reliable tapeout.

Qualifications

• BS + 10+ years of relevant industry experience.
• Experience in CAD, EMIR analysis.
• Knowledge of transistor and gate-level EMIR analysis across static and dynamic modes.
• Experience applying AI/ML or LLM-based tools to EDA flow automation.

Responsibilities

• Define signoff requirements early in the project lifecycle.
• Lead signoff for functional static/dynamic IR analysis, scan-mode IVD, and power EM analysis.
• Collaborate with Design, CAD, and Technology teams to ensure correct EDA flows.
• Provide frontline support for enablement, enhancement, and debugging requests.

Skills

Signoff engineering

EMIR analysis

Python

Perl

CMOS analog

AI in EDA

Education

BS in EE

Tools

Redhawk

Voltus

Totem

Job description

Do you love building elegant solutions to highly complex challenges? Do you believe every detail matters? As part of our Silicon Technologies group, you’ll help design and manufacture Apple’s next-generation, high-performance, power-efficient system-on-chip (SoC) processors — the technology that lets Apple products and services handle everything our customers love doing with their devices, seamlessly and efficiently.

Description

As a Signoff Engineer, you’ll ensure that all necessary verification and analysis work is completed on complex mixed-signal designs prior to tapeout. In this highly visible role on our advanced Signoff CAD team, you’ll work on state-of-the-art designs and apply hands-on experience in power/EMIR analysis to develop, define, and refine signoff methodologies at both the gate and transistor level. This includes, but isn’t limited to, signoff for functional static/dynamic IR analysis, scan-mode IVD analysis, package model handling, power EM analysis, signal EM, power switch modeling, and IP reuse. Our team is also evolving how we approach signoff itself — increasingly exploring AI/ML and LLM-driven techniques to accelerate analysis, automate flow debugging, and surface anomalies earlier in the design cycle. You’ll help define signoff requirements early in the project lifecycle, partner with Design, CAD, and Technology teams to confirm EDA flows and tools are set up and running correctly, and ensure all signoff criteria are met by project close. You’ll also interface directly with design groups, providing frontline support for enablement, enhancement, and debug requests.

Minimum Qualifications

• Minimum requirement of BS and 10+ years of relevant industry experience

Preferred Qualifications

• Experience in CAD, EMIR analysis, or related circuit design roles
• Solid understanding of circuit design principles and EMIR analysis at the transistor and gate level, across multiple modes (static and dynamic)
• In-depth knowledge of industry-leading tools such as Redhawk, Voltus, and Totem
• Experience in simulation and power analysis to verify circuit performance
• Strong understanding of CAD flows
• Proficiency in scripting/programming languages (Perl and Python)
• Excellent communication and collaboration skills
• Experience developing CMOS analog and mixed-signal designs
• Experience applying AI/ML or LLM-based tools to EDA flow automation, anomaly detection, or signoff data analysis

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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Apple accepts applications to this posting on an ongoing basis.