EM/SEB CAD Engineer — VLSI Reliability & Flow Automation

Apple, Inc.; Austin (TX); On-site; USD 70,000 - 105,000; Full time

Job summary

Apple is seeking a highly motivated engineer to join its CAD Group in Austin, focusing on electromigration, SEB, and thermal analysis for gate- and transistor-level designs. The role supports EM/SEB methodology development, flow automation, and verification scripting across clock trees and data nets.

Ideal candidates have a strong VLSI background, familiarity with CAD tools, and hands-on scripting skills. Collaboration with physical design, timing, and circuit teams is essential for success.

Qualifications

• BS or MS degree in Electrical Engineering or related field
• Strong foundation in VLSI design, semiconductor physics, circuit theory, or computer engineering
• Proficiency in Tcl, Python, or Perl scripting
• Exposure to CAD/EDA flows and basic EM/thermal analysis concepts
• Familiarity with commercial EDA tools such as Voltus, RedHawk, Primetime, ICC2, Innovus, or SPICE simulators

Responsibilities

• Assist in development, testing, and deployment of EM/SEB/thermal analysis methodologies and flows
• Support automation, maintenance, and regression testing of CAD flows
• Run, validate, and debug simulation and verification runs on benchmark and production designs
• Develop and maintain verification scripts and rule checks for clock trees and high-speed nets
• Collaborate with cross-functional teams to triage flow execution issues and gather data

Skills

VLSI design fundamentals

Scripting (Tcl/Python/Perl)

EDA tool familiarity

Collaboration & communication

Problem solving

Education

BS/MS in Electrical Engineering

Tools

Voltus

RedHawk

Primetime

ICC2

Innovus

SPICE simulators

Job description

Apple is seeking a highly motivated engineer to join its CAD Group in Austin, focusing on electromigration, SEB, and thermal analysis for gate- and transistor-level designs. The role supports EM/SEB methodology development, flow automation, and verification scripting across clock trees and data nets.

Ideal candidates have a strong VLSI background, familiarity with CAD tools, and hands-on scripting skills. Collaboration with physical design, timing, and circuit teams is essential for success.