DRAM Metrology Overlay Engineer for Process Optimization

Micron Technology, Inc; Boise, Northern (ID, KY); Hybrid; USD 110,000 - 150,000; Full time

Job summary

Micron Technology, Inc. is seeking a Metrology Overlay Process Development Engineer to startup, develop, and optimize overlay metrology for DRAM lithography. You will drive new techniques, calibrate systems, and partner with vendors to improve measurement capability and throughput.

The role requires 3 years in semiconductor overlay, strong data analysis, and proficiency in Python/JMP with excellent communication and teamwork skills; a MS/PhD in a related field is preferred.

Qualifications

• MS/PhD in Engineering, Physics, Materials Science or related field.
• 3+ years in semiconductor overlay/metrology.
• Strong data analysis and software literacy (Python, JMP).

Responsibilities

• Start up, develop, and optimize overlay metrology processes for DRAM lithography flows.
• Collaborate with vendors on software/hardware improvements for overlay techniques.
• Calibrate metrology systems and support process characterization and control.
• Work with process development/integration engineers to optimize measurements.
• Evaluate new metrology tools for cost and accuracy in R&D and manufacturing.

Skills

Overlay metrology

Semiconductor processes

Python

MS Office

Data analysis

Communication

Team collaboration

AI tooling proficiency

Education

MS/PhD in Engineering, Physics, Material Science or related field

Tools

JMP

Python

AI tools (CoPilot, Claude)

Job description

Micron Technology, Inc. is seeking a Metrology Overlay Process Development Engineer to startup, develop, and optimize overlay metrology for DRAM lithography. You will drive new techniques, calibrate systems, and partner with vendors to improve measurement capability and throughput.

The role requires 3 years in semiconductor overlay, strong data analysis, and proficiency in Python/JMP with excellent communication and teamwork skills; a MS/PhD in a related field is preferred.